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Carillon's latest activity
C
Carillon
replied to the thread
I wonder how much performance could be gained with m4 chip in iPad pro OLED, if it had an AirJet
.
The airjets take a huge chunk of space inside a tablet, and consume a lot of power. Having two small holes the size of an headphone jack...
Wednesday at 8:48 AM
C
Carillon
reacted to
Vayra86's post
in the thread
Apparently Valve is giving refunds on Helldivers 2 regardless of hour count. Details inside.
with
Like
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No. Use the law, keeps people straight. The law's also used against you, so fair's fair. Yeah this product was full of red flags from...
Monday at 9:32 PM
C
Carillon
reacted to
phints's post
in the thread
Intel's Panther Lake CPU Generation on Track for Mid-2025 Release, AI Capabilities to See Significant Boost
with
Like
.
If this continous diarrhea of Intel rumors was to be believed they would somehow be releasing 3 generations of CPUs all in one year, all...
Sunday at 7:49 PM
C
Carillon
replied to the thread
NVIDIA Advertises "Premium AI PC" Mocking the Compute Capability of Regular AI PCs
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Problem is that a "premium AI PC" could have no NPU and not be compatible with "AI PC" software. IMHO the AI PC thing is BS, putting an...
May 3, 2024
C
Carillon
reacted to
Vayra86's post
in the thread
NVIDIA Advertises "Premium AI PC" Mocking the Compute Capability of Regular AI PCs
with
Like
.
Nvidia seems so hellbent on telling us that we need this, I'm still trying to figure out why I need this though. Its really getting...
May 2, 2024
C
Carillon
reacted to
wNotyarD's post
in the thread
NVIDIA Advertises "Premium AI PC" Mocking the Compute Capability of Regular AI PCs
with
Like
.
NVIDIA putting the AI in "The way it's meant to be pAId".
May 2, 2024
C
Carillon
reacted to
bonehead123's post
in the thread
Intel Prepares Core Ultra 9 285K, Core Ultra 7 265K, and Core Ultra 5 245K Arrow Lake-S Desktop CPUs
with
Like
.
M.e.H.... I know this is just a leak, but can someone call me when they get real specs showing that these new chips are faster, cooler...
May 2, 2024
C
Carillon
reacted to
Daven's post
in the thread
Intel Prepares Core Ultra 9 285K, Core Ultra 7 265K, and Core Ultra 5 245K Arrow Lake-S Desktop CPUs
with
Like
.
I'm very interested in seeing where Intel goes on the desktop. It has been confirmed that the number of threads will go down (from 32...
May 2, 2024
C
Carillon
reacted to
TheLostSwede's post
in the thread
PCI-SIG Announces CopprLink Cable Specifications for PCIe 5.0 and 6.0 Technology
with
Like
.
No. The cables will also need redrivers/retimers, so it will not be cheaper.
May 1, 2024
C
Carillon
reacted to
A Computer Guy's post
in the thread
Alphacool CORE 1 CPU block - bulging with danger of splitting?
with
Like
.
You forgot the paste!
May 1, 2024
C
Carillon
replied to the thread
PCI-SIG Announces CopprLink Cable Specifications for PCIe 5.0 and 6.0 Technology
.
I wonder if it would be cheaper to use cables instead of traces on a motherboard
May 1, 2024
C
Carillon
replied to the thread
Alphacool CORE 1 CPU block - bulging with danger of splitting?
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And the loop!
May 1, 2024
C
Carillon
replied to the thread
AMD "Strix Point" Mobile Processor Confirmed 12-core/24-thread, But Misses Out on PCIe Gen 5
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The SoC die looks much like a discrete gpu chip with 2 extra infinity fabric links, they might be able to link togheter 2 of those SoC...
Apr 25, 2024
C
Carillon
reacted to
Denver's post
in the thread
AMD "Strix Point" Mobile Processor Confirmed 12-core/24-thread, But Misses Out on PCIe Gen 5
with
Like
.
What's particularly intriguing is AMD's incorporation of a "GPU block" into their chiplet strategy. Creating a GPU die solely for use in...
Apr 25, 2024
C
Carillon
replied to the thread
US Weighs National Security Risks of China's RISC-V Chip Development Involvement
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x86, power, mips are ok, but risc-v is where we draw the line! You will not enter the "half a raspberrypi performance" market! And we'll...
Apr 25, 2024
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