In the latest round of rumors, we have today received some really interesting news regarding Intel's upcoming lineup of desktop processors. Thanks to HKEPC media, we have information about the launch date of Intel's Rocket Lake-S processor lineup and Alder Lake-S details. Starting with Rocket Lake, Intel did not unveil the exact availability date on these processors. However, thanks to HKEPC, we have information that Rocket Lake is landing in our hands on March 15th. With 500 series chipsets already launched, consumers are now waiting for the processors to arrive as well, so they can pair their new PCIe 4.0 NVMe SSDs with the latest processor generation.

When it comes to the next generation Alder Lake-S design, Intel is reported to use its enhanced 10 nm SuperFin process for the manufacturing of these processors. This would mean that the node is more efficient than the regular 10 nm SuperFin present on Tiger Lake processors, and some improvements like better frequencies are expected. Alder Lake is expected to make use of big.LITTLE core configuration, with small cores being Gracemont designs, and the big cores being Golden Cove designs. The magic of Golden Cove is expected to result in 20% IPC improvement over Willow Cove, which exists today in Tiger Lake designs. Paired with PCIe 5.0 and DDR5 technology, Alder Lake is looking like a compelling upgrade that is arriving in December of this year. Pictured below is the LGA1700 engineering sample of Alder Lake-S processor.

An Intel 12th Gen Core "Alder Lake-P" sample surfaced on the Geekbench online results database. The "Alder Lake" microarchitecture introduces heterogenous multi-core to the desktop platform, following its long march from Arm big.LITTLE in 2013, through to laptops with Intel's "Lakefield" in 2019. Intel will build both desktop- and mobile processors using the microarchitecture. The concept is unchanged from big.LITTLE. A processor has two kinds of cores—performance and low-power. Under lower processing loads, the low-power cores are engaged, and the performance cores are only woken up as needed. In theory, this brings about tremendous energy-efficiency gains, as the low-power cores operate within a much higher performance/Watt band than the high-performance cores.

The "Alder Lake" silicon features two kinds of cores—eight "Golden Cove" performance cores, and eight "Gracemont" low-power cores. The "Golden Cove" cores can be configured with HyperThreading (2 logical processors per core). Intel's product managers can create multiple combinations of performance and low-power cores, to achieve total core counts of up to 16, and logical processor counts of up to 24. This also warrants close attention to the composition of the core types, beyond an abstract core-count. A 14-core processor with 6 performance- and 8 low-power cores will perform vastly different from a 14-core processor with 8 performance- and 6 low-power cores. One way to derive core counts is by paying attention to the logical processor (thread) counts, as only the performance "Golden Cove" cores support HTT.

Intel has just launched its Rocket Lake-S desktop lineup of processors during this year's CES 2021 virtual event. However, the company is under constant pressure from the competition and it seems like it will not stop with that launch for this year. Today, thanks to the popular leaker @momomo_us on Twitter, we have the first SiSoftware entries made from the anonymous Alder Lake-S system. Dubbed a heterogeneous architecture, Alder Lake is supposed to be Intel's first desktop attempt at making big.LITTLE style of processors for general consumers. It is supposed to feature Intel 10 nm Golden Cove CPU "big" cores & Gracemont "small" CPU cores.

The SiSoftware database entry showcases a prototype system that has 16 cores and 32 threads running at the base frequency of 1.8 GHz and a boost speed of 4 GHz. There is 12.5 MB of L2 cache (split into 10 pairs of 1.25 MB) and 30 MB of level-three (L3) cache present on the processor. There is also an Alder Lake-S mobile graphics controller that runs at 1.5 GHz. Intel Xe gen 12.2 graphics is responsible for the video output. When it comes to memory, Alder Lake-S is finally bringing the newest DDR5 standard with a new motherboard chipset and socket called LGA 1700.

Intel has been preparing the launch of its 10 nm processors for desktop users for some time now, and today we are getting the first pictures of the Alder Lake-S CPU backside. Featuring a package with a size of 37.5×45 mm, the Alder Lake CPU uses more of its area for a pin count increase. Going up from 1200 pins in the LGA1200 socket, the new Alder Lake-S CPU uses 1700 CPU pins, which slots in the LGA1700 socket. In the picture below, there is an engineering sample of the Alder Lake-S CPU, which we see for the first time. While there is no much information about the processor, we know that it will use Intel's 10 nm SuperFin design, paired with hybrid core technology. That means that there will be big (Golden Cove) and little (Gracemont) cores in the design. Other features such as PCIe 5.0 and DDR5 should be present as well. The new CPU generation and LGA1700 motherboards are scheduled to arrive in second half of 2021.

Intel's upcoming Core "Alder Lake-S" desktop processor, which is shaping up to be the first Hybrid desktop processor, surfaced on the SiSoft SANDRA benchmark database, as dug up by TUM_APISAK. The chip is reported by SANDRA to be 16-core/32-thread, although this is expected to be a combination of eight "big" high-performance cores, and eight "small" high-efficiency cores, in a multi-core topology similar to Arm big.LITTLE. Other specs read by SANDRA include clock speeds around "1.40 GHz," ten 1.25 MB L2 caches (possibly 8x 1.25 MB for the big "Golden Cove" cores, 2x 1.25 MB for the two groups of small "Gracemont" cores), and 30 MB of L3 cache. The Hybrid processor architecture is expected to introduce several platform-level innovations to the modern desktop, taking advantage of the extremely low power draw of the "Gracemont" cores when the machine isn't grinding serious workloads.

In a report by Phoronix, we have the latest information about Intel's efforts to prepare the next generation of hardware for launch sometime in the future. In the latest Linux kernel patches prepared to go mainline soon, Intel has been adding support for its "Meteor Lake" processor architecture manufactured on Intel's most advanced 7 nm node. While there are no official patches in the mainline kernel yet, the first signs of Meteor Lake are expected to show up in the version 5.10, where we will be seeing the mentions of it. This way Intel is ensuring that the Meteor Lake platform will see the best software support, even though it is a few years away from the launch.

Meteor Lake is expected to debut in late 2022 or 2023, which will replace the Alder Lake platform coming soon. In a similar way to Alder Lake, Meteor Lake will use a hybrid core technology where it will combine small and big cores. The Meteor Lake platform will use the new big "Ocean Cove" design paired with small "Gracemont" cores that will be powering the CPU. This processor is going to be manufactured on Intel's 7 nm node that will be the first 7 nm design from Intel. With all the delays to the node, we are in for an interesting period to see how the company copes with it and how the design IPs turn out.

Intel is monetizing its "small" x86 cores across its product lineup, and not just in entry-level client processors. These cores will be part of Intel's current- and upcoming Hybrid processors, and have been serving Intel's re-branded Atom line of high core-count low-power server processors targeting micro-servers, NAS, network infrastructure hardware, and cellular base-stations. A company slide scored by AdoredTV unveils Intel's Atom "Grand Ridge" 24-core processor. A successor to the 24-core Atom P5962B "Snow Ridge" processor built on 10 nm and featuring "Tremont" CPU cores, "Grand Ridge" sees the introduction of the increased IPC "Gracemont" CPU cores to this segment. These cores make their debut in 2021 under the "Alder Lake" microarchitecture as "small" cores.

The "Grand Ridge" silicon is slated to be built on Intel's 7 nm HLL+ silicon fabrication node, and features 24 "Gracemont" cores across six clusters with four cores, each. Each cluster shares a 4 MB L2 cache among the four cores, while a shared L3 cache of unknown size cushions transfers between the six clusters. Intel is deploying its SCF (scalable coherent fabric) interconnect between the various components of the "Grand Ridge" SoC. Besides the six "Gracemont" clusters, the "Grand Ridge" silicon features a 2-channel DDR5 integrated memory controller, and a PCI-Express gen 4.0 root complex that puts out 16 lanes. It also features fixed function hardware that accelerates network stack processing. There are various USB and GPIO connectivity options relevant to 5G base-station setups. Given Intel's announcement of a delay in rolling out its 7 nm node, "Grand Ridge" can only be expected in 2022, if not later.

Intel is preparing to launch an 8-core mobile processor based on its 10 nm "Tiger Lake" microarchitecture, according to a corporate memo by leading notebook OEM Compal, which serves major notebook brands such as Acer. The memo was drafted in May, but unearthed by momomo_us. Compal expects Intel to launch the 8-core "Tiger Lake-H" processor in Q1 2021. This is big, as it would be the first large 10 nm client-segment silicon that goes beyond 4 cores. The company's first 10 nm client silicon, "Ice Lake," as well as the "Tiger Lake-U" silicon that's right around the corner, feature up to 4 cores. As an H-segment part, the new 8-core processor could target TDPs in the range of 35-45 W, and notebooks in the "conventional thickness" form-factor, as well as premium gaming notebooks and mobile workstations.

The 8-core "Tiger Lake-H" silicon is the first real sign of Intel's 10 nm yields improving. Up until now, Intel confined 10 nm to the U- and Y-segments (15 W and below), addressing only ultra-portable form-factors. Even here, Intel launched U-segment 14 nm "Comet Lake" parts at competitive prices, to take the market demand off "Ice Lake-U." The H-segment has been exclusively held by "Comet Lake-H." Intel is planning to launch "Ice Lake-SP" Xeon processors later this year, but like all server parts, these are high-margin + low-volume parts. Compal says Intel will refresh the H-segment with a newer 8-core "Comet Lake-H" part in the second half of 2020, possibly to bolster the high-end against the likes of AMD's Ryzen 9 4900H. Later in 2021, Intel is expected to introduce its 10 nm "Alder Lake" processor, including a mobile variant. These processors will feature Hybrid technology, combining "Golden Cove" big CPU cores with "Gracemont" small ones.

A Linux kernel patch contributed and signed off by Intel confirms that its upcoming Core "Alder Lake" processor will feature a hybrid core topology, much like Core Hybrid "Lakefield." The patch references "Lakefield" and "Alder Lake" under "Hybrid Core/Atom Processors." The patch possibly gives the Linux kernel awareness of the hybrid core topology, so it can schedule its work between the two types of cores on the silicon accordingly, and avoid rotating between the two core groups. Under the Android project, Linux has been aware of a similar tech from Arm since 2013.

Analogous with Arm big.LITTLE, the Intel Hybrid Core technology involves two kinds of CPU cores on a processor die, the first kind being "high performance," and the second being "low power." On "Lakefield," Intel deployed one "Sunny Cove" high performance core, and four "Tremont" low power cores. The low power cores keep the machine ticking through the vast majority of time when processing workloads requiring the high performance cores aren't present. With "Alder Lake," Intel is expected to scale up this concept, with the silicon rumored to feature eight "Golden Cove" high performance cores, and eight "Gracemont" low power ones. The chip is also expected to feature a Gen12 Xe iGPU.

Intel's 12th Gen Core "Alder Lake-S" desktop processors in the LGA1700 package could see the desktop debut of Intel's Hybrid Technology that it introduced with the mobile segment "Lakefield" processor. Analogous to Arm big.LITTLE, Intel Hybrid Technology is a multi-core processor topology that sees the combination of high-performance CPU cores with smaller high-efficiency cores that keep the PC ticking through the vast majority of the time/tasks when the high-performance cores aren't needed and hence power-gated. The high-performance cores are woken up only as needed. "Lakefield" combines one "Sunny Cove" high-performance core with four "Tremont" low-power cores. "Alder Lake-S" will take this concept further.

According to Intel slides leaked to the web by HXL (aka @9550pro), the 10 nm-class "Alder Lake-S" silicon will physically feature 8 "Golden Cove" high-performance cores, and 8 "Gracemont" low-power cores, along with a Gen12 iGPU that comes in three tiers - GT0 (iGPU disabled), GT1 (some execution units disabled), and GT2 (all execution units enabled). In its top trim with 125 W TDP, "Alder Lake-S" will be a "16-core" processor with 8 each of "Golden Cove" and "Gracemont" cores enabled. There will be 80 W TDP models with the same 8+8 core configuration, which are probably "locked" parts. Lastly, there the lower wrungs of the product stack will completely lack "small" cores, and be 6+0, with only high-performance cores. A recurring theme with all parts is the GT1 trim of the Gen12 iGPU.

Intel's Core "Alder Lake-S" desktop processor, which succeeds the 11th generation "Rocket Lake-S," is confirmed to introduce a new CPU socket, LGA1700. This new socket has been churning in the rumor mill since 2019. The LGA1700 socket is Intel's biggest mainstream desktop processor package change since LGA1156, in that the package is now physically larger, and may be cooler-incompatible with LGA115x sockets (Intel H# sockets). The enlargement in package size is seen as an attempt by Intel to give itself real-estate to build future multi-chip modules; while the increased pin-count points to the likelihood of more I/O centralization to the processor package.

The "Alder Lake-S" silicon is rumored to be Intel's first 10 nm-class mainstream desktop processor, combining a hybrid core setup of a number of "Golden Cove" high-performance CPU cores, and a number of "Gracemont" low-power cores. The processor's I/O feature-set is expected to include dual-channel DDR5 memory, PCI-Express gen 4.0, and possibly preparation for gen 5.0 on the motherboard-side. In related news, Intel put out technical documentation for the "Alder Lake-S" microarchitecture and LGA1700 socket. Access however, is restricted to Intel's industrial partners. The company also put out documentation for "Rocket Lake-S."

The upcoming LGA1700 socket by Intel, which makes its debut with 12th generation Core "Alder Lake-S" desktop processors, could be the first in over a decade from the company, to support more than two processor generations. Intel has maintained streak of ensuring that a mainstream desktop CPU socket won't be compatible with more than two generations of Core processors. Controversy brew when the company artificially segmented the LGA1151 socket between the 6th, 7th, and 8th and 9th processor generations, with the latter two requiring a 300-series chipset motherboard and the former two not working on the newer chipset, even though all four generations are pin-compatible, and modders have been able to get the newer chips to work on older 100-series and 200-series motherboards with great success.

According to a NotebookCheck report, Intel is designing the LGA1700 socket to support at least three future generations of Core processors (that's "Alder Lake-S" and two of its successors). This should give the platform a degree of longevity as it introduces several new computing concepts to the client desktop form-factor, such as heterogenous CPU cores. "Alder Lake-S" combines 8 each of low-power "Gracemont" and high performance "Golden Cove" CPU cores in a setup rivaling the Arm big.LITTLE, where light computing workloads and system idling are completely handled by the low-power cores, while the high-performance cores are only woken up from their power-gated slumber as needed, before being put back to sleep when they're not.

A leaked Intel internal slide surfaced on Chinese social networks, revealing five new products the company will build on its 10 nm silicon fabrication process. These include the "Alder Lake" heterogenous desktop processor, "Tiger Lake" mobile processor, "Ice Lake" based Xeon Scalable enterprise processors, DG1 discrete GPU, and "Snow Ridge" 5G base-station SoC. Some, if not all of these products, will implement Intel's new 10 nm+ silicon fabrication node that is expected to go live within 2020.

"Alder Lake" is a desktop processor that implements Intel's new heterogenous x86 core design that's making its debut with "Lakefield." The chip features up to 8 larger "Willow Cove" or "Golden Cove" CPU cores, and up to 8 smaller "Tremont" or "Gracemont" cores. This 8-big/8-small combo lets the chip achieve TDP targets around 80 Watts. Next up is "Tiger Lake," Intel's next-generation mobile processor family succeeding "Ice Lake." This microarchitecture implements "Willow Cove" CPU cores in a homogeneous setup, alongside Xe architecture based integrated graphics. "Ice Lake-SP" is Intel's next enterprise architecture that places mature "Sunny Cove" CPU cores in extreme core-count dies. Lastly, there's "Snow Ridge," an SoC purpose built for 5G base-stations. Image quality notwithstanding, these slides don't appear particularly new, and it's likely that COVID-19 has destabilized the roadmap. For instance, "Alder Lake," and "Ice Lake-SP" are expected to be 10 nm++ chips, a node that doesn't go live before 2021.

Hold on to your helmets: a wild rumor that Intel may be looking to introduce the same design considerations as they already did with their Lakefield architecture has appeared. According to momomo via Twitter (a user who has already shared many rumors and details in the PC hardware space) as well as some other sources, Intel is looking to bring a Big.Little-like design (which Intel calls Hybrid architecture) to the desktop platform in the form of Alder Lake-S, to be reportedly built on the 10 nm process. While Intel's Lakefield (especially geared for the mobile market) only sported four Atom (Intel's low power) Tremont cores combined with one high-performance Sunny Cove core, Alder Lake-S could sport as many as an 8+8 configuration, with a TDP currently set up to 80 W (and up to 125 W TDP is also set in the revealing slides with a disclosure regarding investigating performance scaling in up to 150 W TDP).

Should this actual Alder Lake-S product materialize in the 10 nm process, this could be a way for Intel to salvage what it can from the 10 nm process for the desktop platform. As we know from multiple reports on the state of Intel's 10 nm, yields and operating frequencies aren't close to what was expected, and Intel's CFO George Davis even said at last week's Morgan Stanley's Analyst Conference that their 10 nm process wouldn't be as profitable as even 22 nm, which does show that Intel is already looking past this process for their 7 nm deployment. A Big.Little design for a desktop architecture does seem like a more plausible design decision for a struggling process than a full 16-core monolithic die such as those Intel currently employs.

Intel today unveiled its first clean-slate CPU core micro-architecture since "Nehalem," codenamed "Sunny Cove." Over the past decade, the 9-odd generations of Core processors were based on incrementally refined descendants of "Nehalem," running all the way down to "Coffee Lake." Intel now wants a clean-slate core design, much like AMD "Zen" is a clean-slate compared to "Stars" or to a large extent even "Bulldozer." This allows Intel to introduce significant gains in IPC (single-thread performance) over the current generation. Intel's IPC growth curve over the past three micro-architectures has remained flat, and only grew single-digit percentages over the generations prior.

It's important to note here, that "Sunny Cove" is the codename for the core design. Intel's earlier codenaming was all-encompassing, covering not just cores, but also uncore, and entire dies. It's up to Intel's future chip-designers to design dies with many of these cores, a future-generation iGPU such as Gen11, and a next-generation uncore that probably integrates PCIe gen 4.0 and DDR5 memory. Intel details "Sunny Cove" as far as mentioning IPC gains, a new ISA (new instruction sets and hardware capabilities, including AVX-512), and improved scalability (ability to increase core-counts without running into latency problems).