AMD "Raven Ridge" Silicon Detailed
The "Zen" CPU micro-architecture seems to be turning AMD's fortunes as it reported its first black quarter in years. The 14 nm "Zeppelin" or "Summit Ridge" die is at the heart of this change. This 8-core CPU die is implemented on everything from performance mobile packages, to single-die mainstream-desktop socket AM4 under the Ryzen 3, Ryzen 5, and Ryzen 7-series, 2-die high-end desktop (HEDT) multi-chip modules under Ryzen Threadripper, and the 4-die enterprise multi-chip modules under the EPYC brand. The next logical step for AMD with its new "Zen" CPU IP was to fuse it with the "Vega" graphics architecture, and give its APU lineup a much needed overhaul. At the heart of this move is the new 14 nm "Raven Ridge" silicon.
While "Summit Ridge" is the combination of two "Zen" CCX (quad-core CPU complex) units making up an 8-core CPU die that lacks integrated graphics, the "Raven Ridge" silicon combines one "Zen" CCX with an integrated graphics core based on the "Vega" architecture. AMD's new Infinity Fabric interconnect ferries data between the CCX and the iGPU, and not an internal PCIe link. The CCX houses four "Zen" CPU cores with 64 KB of L1I cache, 32 KB of L1D cache, 512 KB of dedicated L2 cache, and 4 MB of L3 cache shared between the four cores.
While "Summit Ridge" is the combination of two "Zen" CCX (quad-core CPU complex) units making up an 8-core CPU die that lacks integrated graphics, the "Raven Ridge" silicon combines one "Zen" CCX with an integrated graphics core based on the "Vega" architecture. AMD's new Infinity Fabric interconnect ferries data between the CCX and the iGPU, and not an internal PCIe link. The CCX houses four "Zen" CPU cores with 64 KB of L1I cache, 32 KB of L1D cache, 512 KB of dedicated L2 cache, and 4 MB of L3 cache shared between the four cores.