Techspot used the rm1 cooler for the 65w result. Im not sure exactly what your issue is with that one, to me its obvious they set pl2 to 65w.
My problem is that without them actually specifying this explicitly, we have to resort to the kind of speculation you just did. And another key problem in this discussion is that you don't see a problem with such speculation, as you assume that your speculation must by default be true. It
might be, but that is a level of insecurity that is not acceptable when trying to actually understand something as nuanced and fine-grained as what we're talking about here.
It wouldnt make sense any other way since, the way they phrased it in the review, it would be idiotic to have pl1 at 65 and unlimited pl2. Plus the score would have been higher if that was the case, as demonstrated by their power unlimited test.
I agree that it wouldn't make sense in any other configuration, but again, this is not proof that that is how they configured it. Humans are only partially rational people, and we can only act on the basis of what we know. And, crucially, people fuck up too, doing things wrong or things they didn't mean to do. Unless explicitly told otherwise, we cannot assume that they configured it correctly. We can
hope they did, at best.
I dont see anything wrong with igorslab review either. Yes zen were run with pbo but that's irrelevant, what matters is the 12900k perfromance at 125w. Since in the blender test it matches a pboed 5900x and slaps the 12600k, there is no way in cbr23 it gets matched by the 12600k.
As you're using that review as an efficiency comparison for both, it is obviously problematic to have PBO active for the 5950X, as that pollutes the data you're using for your comparison.
Club365 used xtu to power limit, they even have a picture of their settings in the first page. And since the numbers perfectly match the ones i observed with 3 cpus tested witb 4 different motherboards, i have no reason to doubt them. The cpu is running at 4.3 ghz for the pcores
That's good to know - though a bit hilarious that they (likely to "provide proof" of the configuration being active while benchmarking) covered up half the gauges with the Blender window. Still, just about readable.
Today im back, i can show you the 29900 score and all that, but i find it irrelevant cause, how can i show you im running a u12a? I might as well have a custom loop for all you know.
...you seem to have entirely missed the point of mentioning cooling: the point isn't what specific cooling you're using, the point is that for a valid comparison, cooling must be eliminated as a variable, i.e. it must be the same across all systems tested. It's a huge part of why comparing benchmarks done by various forum members is inherently unrepresentative (unless you have a
huge selection and can control for a bunch of variables), as there's too much uncertainty. Heck, just where you live and your room temperature can have significant effects on results.
Regarding what went wrong with tpu, fixed voltage is by far the most likely explanation. Msi boards are quite reknown (mine included) for doing shaenaningans, although he uses an asus hero, and as far as my experience with the asus apex goes, it wasnt doing any weird stuff when plimited,but who knows, maybe the hero does.
Wait, these boards set fixed voltages by default? Holy crap, that's ... that's like class action lawsuit levels of misconfiguration. I guess I'm glad I've never owned an MSI motherboard. I guess that might also go some way towards explaining Igor's crazy Zen3 power readings, as he seems to use MSI motherboards exclusively.
What i find really weird is how he himself didnt get puzzled with the results. That's by far my biggest surprise.
My guess: probably didn't stand out enough to really make note of in the midst of a massive CPU launch review blitz. Still something that ought to be looked at though.
But back to the core issue here, and what has been discussed for the past few posts: your extrapolations, your attitude to them, and your inflexibility and inability to adjust and maintain nuance in your arguments. I went into this a bit in the previous post, and above as well, but it still seems to not be sinking in.
In short: it's quite possible - or, likely even - that a theoretical 16 GC P core CPU would be more efficient than a 5950X at some range of power levels. That's the nature of a wide design - if not pushed to high in terms of clocks, they're extremely efficient. Just look at Apple's M1 - it's so wide that it matches both of these cores at just 3/5ths the clock and a fraction of the power. But it's also
frickin' huge. As is ADL, though not on quite the same scale. You can of course choose to ignore die space efficiency in your arguments for performance efficiency (though that's a cost, just like power is a cost), but it's a major disadvantage in this regard - but one that also brings with it the possibility of going wide-and-slow.
The problem is that ADL has rather unpredictable and complex power behaviour. It boosts extremely high, and can, as we've seen, consume 55-60W in instruction dense workloads for a single core - but also sits much lower even at stock in lighter workloads, at ~25-30W in SPEC ST, for example. That of course also means that MT clock scaling will vary wildly when strictly power limited - in instruction dense/heavy workloads, 16 such cores in ~115W (assuming 15W uncore power), would clock much, much lower than what that single core can do, even if that single core goes far, far beyond its efficiency sweet spot.
Further complicating this is the inherent efficiency disadvantage of Zen3 due to through-package IF, which means its uncore consumes ~10-15W more than Intel's. That's nearly a core at full load worth of difference, so definitely significant. And it means that we get scenarios such as this (which is made up, and obviously not accurate to anything at all, but at least in the ballpark)
ST, instruction dense: ADL is a bit faster (~20%?), but consumes ~70% more package power, losing clearly in efficiency.
ST, not instruction dense: ADL is a bit faster, consumes a bit more core power, but notably less uncore power, thus leading in efficiency - anything from a slight to clear lead depending on the workload.
Low threaded (2-4), not instruction dense: same as above.
Low threaded, instruction dense: ADL falls
way behind in efficiency unless power limited - but probably performs well when power limited. A complex range of efficiencies across vendors and chips.
nT, instruction dense: Likely an AMD advantage, as the higher uncore power makes less of an impact, while AMD's low per-core power means high clocks even at sustained heavy all-core loads.
nT, not instruction dense: Likely Intel advantage, assuming they maintain high clocks.
While this was all made up, what is the takeaway from seeing results such as these across various benchmarks and test suites? That just as with all other hardware, current boost behaviour, power limits, and other automated self-regulation processes makes testing - and reading results! - a lot more complicated, and conclusions are decreasingly simple and straightforward. And it especially makes theoretical, on-paper extrapolations more complicated, verging on impossible. The number of variables is increasing, and accounting for them is increasingly difficult.
We all know that ADL is fast, and performs well even at lower power limits - chips like the 12300 and 12100 demonstrate that very well. But there are still unanswered questions: What clocks would such a theoretical 16c chip be able to maintain across various workloads? How would uncore power change with the move to either a dual ring bus or mesh fabric? How would either of these affect performance through core-to-core latencies? How would cache configurations affect this - and how much cache would said chip have? If it doubled the cache of the 12900K, then that would again balloon the die area needed - and, once again, cost - while if L3 was kept lower, that would in turn hurt per-core performance.
On top of this, there are configuration differences and binning differences between existing CPUs that you are using to extrapolate your data, where you have consistently been highly selective - complaining of people bringing up the 12400 due to your impression that it's a terrible, inefficient bin, yet at the same time insisting on the 5800X - which is also the least efficient bin of desktop Zen3, by quite some distance - as the point of departure for comparing the two.
So: there are lots of unknowns here, and your extrapolations are far too simplistic, at times carry clear and obvious bias, and you are presenting them in a bombastic, nuance-free way that prompts counterarguments rather than constructive discussion. That doesn't mean that everything you have said is wrong - but it makes it impossible to have a constructive discussion. What could have been an interesting back-and-forth thought experiment instead degrades into an unconstructive shouting match because your way of presenting things forces everyone else into an involuntarily defensive stance trying desperately to add back some of the nuance your statements lack.
Which in turn, means that when you say hare-brained stuff like "ADL is more efficient everywhere" ... you're not only flat-out wrong, as we
know there are scenarios - such as heavy/instruction dense ST tasks, as well as MT tasks at stock power - where Zen3 is indisputably drastically more efficient - but you're wrong in an unconstructive way that fosters dissent and conflict. Even if not intended that way, that way of talking is troll language. If you want to have a rewarding and productive discussion, you need to present your arguments reasonably and with nuance. And with sources. Without that, all you're achieving is asking for pushback, and turning everything into unnecessary conflict.
It's heavily biased to test the CPU at same power limits? BIASED? Really? LOL
I had to respond to this one last thing: as I've said about 652 million times in this thread: When testing at the same power limit means drastically different changes from stock power for each product being compared, then yes, that is indeed biased. It doesn't render the data useless, or the findings untrue, but it is an unequal comparison, as the products being tested all have stock configurations, and deviations from those thus represent changes from the inherent behaviour of the product. You can argue that the stock config of high end ADL is stupid, but that's another issue entirely - it doesn't make it any less biased to compare heavily underclocked ADL to stock-powered Zen3.
Sapphire Rapids is a HPC/server CPU, not a prosumer one, and I would be very surprised if they pushed out another "enthusiast HEDT" product after the PR faceplant of the """5GHz""" Xeon W-3175X, which had the tech world laughing at them for months afterwards.
