Well I tend to think of netburst as a IPC and clock speed architecture, they were going for high clocks looking for IPC on the limited process capability of the day. As process tech improved they found the long pipeline design to be less eficient and was giving negative returns on IPC for MHZ increases, So with better process tech and the lessons learned they went back to the p3 design and modernized it for core. Which was a really good idea. P3 was a pretty solid design.
AMD however has completely tossed the entire design out the window. Actually given equal process I expect AMD and BD to beat intel in a number of ways but not in pure IPC per clock.
Heres what I expect
Slightly lower IPC per mhz, but a higher clock to correct for that, being able to share resources lets them stick more in a core, also their design better distributes thermals over the chip and its more segrgated in a few ways, so they can really clock up the chip and shut down uneeded core to improve IPC in workloads where high IPC matter and core count is less relevant.
They actually have done a good job, now the issue will become execution, did they get the execution right, if they did they should have a incrediable value with good thermal and power management with competitive IPC " not in a clock for clock ratio though" but in a core for core ratio.
If they did everything right.
this design really hits at where the workloads are, more INT then FPU and then a powerful FPU to cover those workloads as well. Its a fucking brilliant design. Question is do they have the quality of cache, int,fpu,decode,prefetch etc to be comparable to intel. Given the R&D time involved, I don't think they left many stones uncovered. This chip is aiming for a braod range of efficiency compromises and if done properly, should be a great product.
