AMD FX-8130P Processor Benchmarks Surface

[Thefumigator]

a better way to count cores on a processor is by performance increase:
imagine the following performance scaling from an eight core opteron (lets say, 2 sockets, 4 cores each)

1 core 100%
2 cores 195%
3 cores 290%
4 cores 380%
5 cores 475%
6 cores 570%
7 cores 665%
8 cores 760%

If BD manages to keep that kind of efficiency when comparing 1 thread to each multiple thread, then I would consider it as an 8 core solution.

I wonder if core i7 2600 with 4 cores and 8 threads scales this well. I would like to see the chess benchmark or something similar. Or maybe I should read HT vs NONHT core i7 reviews somewhere...

 

[Nanyang]

Im use both (Intel side) i7 950, i7 870, i7 2600K, and (AMD side) Athlon II X2 255, Phenom II X4 955 and Phenom II X6 1055T

What i wan to say... Why not... i cant wait to buy this 8-Core... i still prefer my AMD X6 then my i7 950 because heat... Im live in hot asia... cool processor is better for me...

PS: to AMD on what ever u do u still the best for me... but i still like your Athlon XP

 

[THANATOS]

Thefumigator no BD modul should have just 180% increase over a single core instead of 195% like in classical 2 core(CMP) design.
But the funny thing is HT can increase performance by just 15-25% if the program is optimized and if not It can even degrade your performance. So I am voting for AMD's approach although their naming scheme of 8 cores instead of 4 cores with mega threading was a failure on their part and do you know why?
BD 8130 will be compared to SB2600k and in multi-threading it will win but it won't be as significant because everybody will say that was to be expected its a battle between 8 cores versus 4 cores another example a battle between BD against SB-E where it will loose even in MT workload but then It will be how shitty AMD cpu is when a 6 core can win over an 8 core, what isn't true, it was true SB2500 versus Thuban although in some cases Thuban won. They are 4 cores, one uses SMT approach and the other CMT, one gives better performance increase with a 12% increase in core area and the other max 25% and sometimes you have lower score than without it but it costs just 5-7% of die space, yet one is an 8 core and the other 4 core just because it has 2 integer units. Its just not logical calling it an 8 core like Thuban is a 6 core, die area and performance increase in MT is way different.

http://www.techpowerup.com/img/10-08-25/bulldozer-8.jpg
just by the green parts should be a BD called an 8 core? Thats so stupid when an 8130 or 4 module has 4 identical modules(extended cores) and one module is shown in the picture.

 

[Pestilence]

Im use both (Intel side) i7 950, i7 870, i7 2600K, and (AMD side) Athlon II X2 255, Phenom II X4 955 and Phenom II X6 1055T

What i wan to say... Why not... i cant wait to buy this 8-Core... i still prefer my AMD X6 then my i7 950 because heat... Im live in hot asia... cool processor is better for me...

PS: to AMD on what ever u do u still the best for me... but i still like your Athlon XP

My X6 put out way more heat then my 920 ever did.

 

[HammerON]

I am perplexed by all of the comments in this thread!!! I am more interested in how AMD's "8 core" cpu's will run in World Community Grid or Folding@Home. So far the only CPU to buy is Intel in regards to crunching or folding.

 

[Pestilence]

I never understood why people Fold. He'll my computer is only on maybe an hour a day weekdays

 

[HammerON]

I never understood why people Fold. He'll my computer is only on maybe an hour a day weekdays

People fold and crunch to help find solutions to many of the issues facing our human population. Just do a search and see what results you get

 

[a_ump]

I never understood why people Fold. He'll my computer is only on maybe an hour a day weekdays

^, and the folders/crunchers leave their comps on all day i believe, or for a good while during the day and off at night? i know i left mine on 24/7 when i was folding

 

[laszlo]

With that in mind, I present my own SuperPI times, done with my 2600k @ 4.9 GHz(2133 MHz memory)

Wake me up when AMD can reach these.

No offense but can i ask u also to wake me up when u can use these pi scores for something real or put these workload in a daily used soft?

 

[cadaveca]

No offense but can i ask u also to wake me up when u can use these pi scores for something real or put these workload in a daily used soft?

Sure. Read one of my reviews. Note the trend between the graphs? Write the numbers in a spreadsheet, and you can come up with a mathematical formula to correlate SuperPi to realworld performance.

Or I guess you never tOok statistics in school?

Or how about this, you monitor memory I/o, and instead of looking at the app results, you see how it stresses the system, and measure that?

or just read the thread.

 

[Benetanegia]

Haha, blame Wikipedia's definition. And I understand exactly how important a fetch and decode unit is to a processor (and I'm sure AMD does too). It's got to get an instruction from memory (or cache if available), and then decode it to understand how to execute the given instruction. I can also see how it could be shared with only one other "core" with minimal impact to performance, and I bet AMD has a far better picture than I do.

Oh I'm sure that performance will be good, much more than one core performance per module, but that is also true for SMT and they don't call it a core. Whether performance approaches that of 2 cores or not, doesn't change the fact that they are not 2 cores in reality.

Also most expect to have an FPU and a branch predictor in a "core" as well, but the 486 didn't have a branch predictor, and the 386 had neither. I don't consider those "zero-core" processors, do you?

A CPU has two main parts, the control unit (front end) and the execution unit. It needs both in order to operate, but depending on the CPU type and purpose each of them can have or lack some capabilities. But regardless of the purpose or capabilities, both units are unavoidable.

An FPU and branch predictor are extensions to those already existing units. The FPU is part of the execution unit and the branch preditor is an extension to the front end. It's part of the fetching unit in an out-of-order CPU and cannot operate nor has a purpose outside of it.

Early processors could only operate on integers, but that doesn't change a thing, the execution unit was simply not as advanced. They later added a coprocessor on the MB, but architecturally the FPU was already part of the execution unit and thus, the CPU. And at any rate an FPU cannot operate outside of the CPU, it requires the control unit to fetch and decode the instructions for him. All of them execution units need them, hence why for me 1 fetch and decode unit means 1 core, and always will. A more robust and at the same time more streamlined core probably, but a core nonetheless.

On a very different situation the memory controler is not an integral part of the CPU, it operates outside of the CPU and has a purpose outside of the CPU. It controls the memory whether it's for a CPU, a GPU or an application specific processor, like a sound processor or A/V decoder. Including it in the die, shortens up latencies so it's desirable, but that's all.

 

[GenTarkin]

Thefumigator
But the funny thing is HT can increase performance by just 15-25% if the program is optimized and if not It can even degrade your performance.

HT does not increase performance when a program is optimized for it. HT most commonly picks up where crappy written code left off.
When there are huge amounts of thread stalls, and that sort of stuff, this is where HT benefits the most because it can take the other thread and fill in the gaps while the other stalls - keeping the pipes as full as possible.
This most commonly happens is some unique workload types .. but mostly happens when someone writes shitty code.
A program that is written decently will most likely be the least to benefit from HT.

---
I kinda enjoy AMD's approach to this issue, rather than using HT in their cores, knowing the caveats of x86 and sometimes crappy code writers, they sat back and said...whats the point of making the fattest core possible?? - none really because it isnt utilized most of the time 100%. So, they decided to make skinnier, leaner (both transistor and power budget) cores, which have a chance of being, more often times then not, fully utilized. The advantage being that although the cores themselves may be leaner (a tad weaker)... at least 2 threads arent fighting over resources as much as they would be in an HT setup.


But, I do agree w/ some of your guys statements. I see this implementation and the fact AMD is marketing them as 8cores and part of me thinks they should be marketing them as 4 cores yet w/ a significant advantage over HT cores.
I guess thats why, when it comes to it...they are priced really close to intel's 4 core SB's. Because if they were to be priced at the levels of 8 cores then AMD would be doing it wrong.

 

[Thatguy]

AMD is building a more load balanced cpu, looking at work loads they are putting on more of things that matter and less of things that don't. But most aren't paying attention to that. Intel is shitting a brick right now over APU shipments. Things are not gonna look so good for the other side when this balanced approach shows its stuff.

 

[Thefumigator]

AMD is building a more load balanced cpu, looking at work loads they are putting on more of things that matter and less of things that don't. But most aren't paying attention to that. Intel is shitting a brick right now over APU shipments. Things are not gonna look so good for the other side when this balanced approach shows its stuff.

What do you mean with the brick? Intel is playing dirty again?

 

[Pestilence]

AMD is building a more load balanced cpu, looking at work loads they are putting on more of things that matter and less of things that don't. But most aren't paying attention to that. Intel is shitting a brick right now over APU shipments. Things are not gonna look so good for the other side when this balanced approach shows its stuff.

Intel made 4 billion last quarter. Amd made 800 million. Intels not worried at all

 

[Thefumigator]

Intel made 4 billion last quarter. Amd made 800 million. Intels not worried at all

Shareholders might be.

 

[Pestilence]

Interlagos 4x16 did project 6901 in 3 mins 52 seconds
^that was an A1 sample



140->280->420->560->700->840->980->1120

Is the scaling



I checked up something
A1->B1 performance never changed in the memory subsystem so ya...there is going to be a huge room of performance on the memory side that we don't see

I think the performance gain your looking for just wont be there ser but time will tell

 

[XoR]

x87 is emulated not ditched

On 686+/K5+ designs all instructions are "emulated". It's just a matter how well decoder can transform and reorganize in real-time badly written code (from execution units point of view) and to have good execution units. AMD could be using less resources on x87 and then shame on AMD

and wPrime 1024m tells the story

if overal performance of AMD K10.x CPUs were to Core2+ as SuperPI shows it then AMD would be now just a memory...

 

[seronx]

On 686+/K5+ designs all instructions are "emulated". It's just a matter how well decoder can transform and reorganize in real-time badly written code (from execution units point of view) and to have good execution units. AMD could be using less resources on x87 and then shame on AMD

Shame on you!

x87 is dead
Hail! SSE

 

[cadaveca]

Technically, x87, via SuperPi, had been a metric that has been standard for the extreme OC'ing scene forever.

Drop support for that is dropping support for that scene. Could my wishes comes true?

Not too sure why such a small segment of users drives product design so greatly, anyway, but OK.

i kinda think ASUS' ROG line, GIgabyte UD7 boards, and the other high-end products are a waste of R&D dollars too, technically, as their cost in retail greatly surpasses what most can afford. I mean I udnerstand that stuff from the high-end maybe in a couple fo gens becomes standard, but damn.

 

[TheoneandonlyMrK]

I never understood why people Fold. He'll my computer is only on maybe an hour a day weekdays

theirs many a reason brother, they drop dead every day

 

[Benetanegia]

140->280->420->560->700->840->980->1120

Is the scaling(Maximum efficiency scaling.

Nice nmbers those that came out your ass bro. lololol

Scaling can never be better than +100% per core. And also 140% for 1 core? If you want to make up some numbers, I'm sure you can do it better.

And I'll tell you now that with the shared resources, especially the fetch/decode unit which does 4 Mops/cycle per module, for each "core" that can handle 4 Mops, so 8 per module, scaling is not going to be anywhere near 100% per core, except on some very espeific and rare ocasions.

 

[erocker]

The actual numbers are

100% -> 280% -> 380% -> 560% -> 660% -> 840% -> 940% -> 1120%

Gulftown

100% -> 250% -> 350% -> 500% -> 600% -> 750% -> 850% -> 1000% -> 1100% -> 1250% -> 1350% -> 1500%

Sandy Bridge

100% -> 275% -> 375% -> 550% -> 650% -> 825% -> 925% -> 1100%

How they play out in real world is totally dependent on the software

Where in the heck are you coming up with this?

 

[Benetanegia]

Where in the heck are you coming up with this?

From where the sun never shines, obviously.

 

[Benetanegia]

lol, if you think that go ahead



and to erocker

Intel's SMT and AMD's CMT can peak out

100% -> 300%

The second core / thread can 1.5x the throughput of the module/core

But, in the real world you rarely peak out ever or will be able to use theoretical limits

No I don't think, I KNOW that you are making those numbers up. lol

The maximum that a second core can do is add another 100%, that is, doubling up peak performance and that only under very favorable conditions.

A 3rd core will 3x the performance and so on.

Your over 100% inprovements are pure BS.