- Joined
- Dec 6, 2011
- Messages
- 4,784 (1.01/day)
- Location
- Still on the East Side
Tensilica, Inc. today announced that VIA has selected Tensilica's Xtensa dataplane processors (DPUs) for a system-on-chip (SOC) design for solid state drives (SSDs). After conducting a technical evaluation, VIA determined that Tensilica's DPUs provide over four times the performance of competing processors on key algorithms used to benchmark competitive alternatives.
SSDs require faster and more efficient data management and manipulation to increase their throughput (measured in Input/Output Operations per Second, or IOPS). With conventional processors, increasing the clock speed is the common way to increase performance. However, this increases energy consumption and die size, especially as speeds increase so much that designers are forced to move to more complex multi-core solutions.
Tensilica's DPUs allow designers to customize the IP core, mix both control and signal processing, and add high-bandwidth connectivity to increase performance without increasing the clock speed. For example, designers can use single-cycle bit field manipulation and arithmetic instructions along with multiple simultaneous single-cycle table lookups to achieve over 10 times the efficiency of other processors. This not only increases IOPS, but also significantly reduces the energy consumed and the complexity of the SOC design itself.
"In the SSD market, every competitive advantage we can get is very important," stated Jiin Lai, VIA's CTO. "We have a significant advantage using Tensilica DPUs to lower the power and increase the throughput of our products."
"VIA is a great example of how our customers benefit from high performance, low energy consumption, and small die size with Tensilica DPUs that have full software and hardware development paths which simplifies integration with existing RTL and software," stated Steve Roddy, Tensilica's vice president of marketing and business development.
View at TechPowerUp Main Site
SSDs require faster and more efficient data management and manipulation to increase their throughput (measured in Input/Output Operations per Second, or IOPS). With conventional processors, increasing the clock speed is the common way to increase performance. However, this increases energy consumption and die size, especially as speeds increase so much that designers are forced to move to more complex multi-core solutions.
Tensilica's DPUs allow designers to customize the IP core, mix both control and signal processing, and add high-bandwidth connectivity to increase performance without increasing the clock speed. For example, designers can use single-cycle bit field manipulation and arithmetic instructions along with multiple simultaneous single-cycle table lookups to achieve over 10 times the efficiency of other processors. This not only increases IOPS, but also significantly reduces the energy consumed and the complexity of the SOC design itself.
"In the SSD market, every competitive advantage we can get is very important," stated Jiin Lai, VIA's CTO. "We have a significant advantage using Tensilica DPUs to lower the power and increase the throughput of our products."
"VIA is a great example of how our customers benefit from high performance, low energy consumption, and small die size with Tensilica DPUs that have full software and hardware development paths which simplifies integration with existing RTL and software," stated Steve Roddy, Tensilica's vice president of marketing and business development.
View at TechPowerUp Main Site
or they are doing some laundry work for some cartels or triads... 
