Intel 14-nanometer Skylake Platform To Support DDR4, PCIe 4.0, SATA Express

[DayKnight]

Thats been abbreviated like that since ever. 2H, Q4 etc are all common abbreviations.

This is the first ever time I am reading '2H'.

The norm or standard is Q1, Q2 etc. Not 1H, 2H etc.

 

[radrok]

My guess is that Intel is doing this on purpose just to have one more selling point for the X79 platform.

To be honest I'm pretty sure who can use more than the Z87's standard platform lane assignment can probably afford an X79 based build...

The X79 quad + X79 motherboard combo doesn't cost that much more than a Z87 quad + Z87 mobo.

 

[cdawall]

This is the first ever time I am reading '2H'.

The norm or standard is Q1, Q2 etc. Not 1H, 2H etc.

No 1H and 2H are pretty standard for first and second half. Read through some more news posts amd see youself.

 

[Phobia9651]

This is the first ever time I am reading '2H'.

The norm or standard is Q1, Q2 etc. Not 1H, 2H etc.

Well there are 4 quarters and 2 halves in a year, 1H and 2H make perfect sense in the case where the exact quarter isn't known yet.

 

[Phobia9651]

To be honest I'm pretty sure who can use more than the Z87's standard platform lane assignment can probably afford an X79 based build...

The X79 quad + X79 motherboard combo doesn't cost that much more than a Z87 quad + Z87 mobo.

I was more or less referring to the cases where people use a RAID card or PCI Express SSD, but like you said in those cases you probably can afford a S2011 cpu and X79 mobo as well.
Sucks though that X79 is an oldtimer compared to Z87.

 

[radrok]

Sucks though that X79 is an oldtimer compared to Z87.

Indeed, X79 is like an old elephant in Intels building.

Well there are 4 quarters and 2 halves in a year, 1H and 2H make perfect sense in the case where the exact quarter isn't known yet.

Agreed.

 

[Intel God]

My guess is that Intel is doing this on purpose just to have one more selling point for the X79 platform.
Even the 990FX platform dating from 2011 has 38 lanes, where as the Z87 platform has only 24

Z87 has 3.0 lanes tho while 990FX only has 2.0.

 

[cdawall]

Z87 has 3.0 lanes tho while 990FX only has 2.0.

Not entirely true there are some rev 3.0 990FX boards with PCI-E 3.0.

 

[NeoXF]

PCiE 4.0 already? I just barely see the benefit of PCIE 3.0 over the 2.0

If by already you mean 2 years, minimum, from now, then yes.

 

[Nordic]

So seems to be 10% per generation. So from sandy skylake supposedly would be a (ivy, haswell, broadwell, skylake) 40% more performance at stock clocks? My 2500k is going to last me a long time it seems.

 

[Hood]

So seems to be 10% per generation. So from sandy skylake supposedly would be a (ivy, haswell, broadwell, skylake) 40% more performance at stock clocks? My 2500k is going to last me a long time it seems.

That sounds about right, but don't forget that improvements in bus speeds and memory controllers count for a lot. Look at the difference between your Sandy and the Yorkfield (Core 2 Quad) generation - performance has doubled in about 6 years. So maybe overall performance will nearly double between Sandy and Skylake when you factor in DDR4 and SATA Express. I'm not upgrading my Ivy until then since there's no real reason to.

 

[Steevo]

It's laughable how gullible PC enthusiasts can be...

There is absolutely no need for or advantage to having DDR4 and PCIe 4 on a current model desktop regardless of what CPU/APU it has. DDR4 is primarily for server use. It will be expensive, impractical for most desktop PCs and not offer any real advantage over LV DDR3 on the desktop.

PCIe 3.0 isn't even being widely used yet because PCIe 2.1 isn't a system limitation. More bandwidth on a system that isn't bandwidth limited makes no system performance gain.

All of this crap is marketing hype to try and boost sagging PC sales. It doesn't cost mobo makers more than a few pennies if that to use future standards that offer no real system performance gains. This allows the mobo makers to hype the future tech, charge even more excessive prices and the sheeple will spend their money like drunken sailors.

One answer for all of your "sheeple" issues.


ODT
On Die Termination.
For memory operating at a significantly higher voltage than die traces can handle, meaning we either have to perform extra steps during manufacturing, or create more traces to dump the voltage.
For PCIe, most of the same reasons listed above.
For all other interconnects, see above.

When all Intel or AMD had to do was create a chip and the NB handled the voltage power differences, termination, and much else it wasn't an issue. However now that it is on die it is becoming much more difficult to maintain signal integrity at lower voltages while assuring reliability with multiple manufacturers of memory, motherboards, PCIe devices.

Add to this idea that if AMD has figured out heterogeneous memory, Intel is surely on the same path and as we approach the efficiency limit in processing serial data and find parallel falling behind without a "co-processor" added on that needs higher speed memory access we find the need to make the next jump in performance to occur.

In short, the people you are calling people sheeple in a vain attempt to cover your lack of knowledge know what and why this is needed, so not only do you look like a dick, but a stupid dick.