Bastieeeh
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| Processor | Dual Xeon 2.8GHz |
|---|---|
| Motherboard | Asus PCH-DL |
| Cooling | Alphacool NexXxoS XP and Dual Laing |
| Memory | 4GB Samsung |
| Video Card(s) | Sapphire X800XT |
| Storage | 8x Hitachi 7K250 Raid 5 and 2x WD Raptor74GB Raid 0 |
| Display(s) | Eizo 21" FlexScan T966 CRT and S1910 LCD |
| Case | Lian Li PC-V2100B |
| Audio Device(s) | Creative SB Audigy 2 ZS |
| Power Supply | Tagan 480W TG480-U01 |
Penryn is Intels next generation of the Core 2 Duo with 'Conroe'-core. Based on a 45nm process and an improved High-k dielectric together with metal gates the Penryn features the SSE4 instruction set (aka Nehalem New Instructions, NNI), and a 6MB/12MB L2-cache (Core 2 Duo/Core 2 Quad). Power consumption will roughly be the same, 65W TDP for the Duo and 105W for the Quad. The working frequencies will be higher than 3GHz for the top models resulting in around 20% more performance when playing games. Video-trancoding that utilizes the new SSE4 instructions will be around 40% faster Intel says.
The mobile Penryn features an additional 'deep power down'-state where both caches will be deactivated, the core-frequency and -voltage are lowered by a significant amount. Furthermore the chip is able to change both core's frequencies and voltages indepentently from one another. Let's say you are using a single threaded application for a while the second core won't have much to do it will power itself down whereas the other core could power it up to improve the performance.
In late 2008 Intel plans to release the Nehalem architecture which comes with an integrated memory controller. By then the front side bus days will be over, a serial Hypertransport-like interface called 'CSI' (Common System Interface) will replace it.
Update: AnandTech covers the story as well with a whole article dedicated to the Penryn and Nehalem.
View at TechPowerUp Main Site
The mobile Penryn features an additional 'deep power down'-state where both caches will be deactivated, the core-frequency and -voltage are lowered by a significant amount. Furthermore the chip is able to change both core's frequencies and voltages indepentently from one another. Let's say you are using a single threaded application for a while the second core won't have much to do it will power itself down whereas the other core could power it up to improve the performance.
In late 2008 Intel plans to release the Nehalem architecture which comes with an integrated memory controller. By then the front side bus days will be over, a serial Hypertransport-like interface called 'CSI' (Common System Interface) will replace it.
Update: AnandTech covers the story as well with a whole article dedicated to the Penryn and Nehalem.
View at TechPowerUp Main Site
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