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First AMD "Zen" Chips to be Quad-Core

btarunr

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Some of the first CPUs and APUs based on AMD's next-generation "Zen" micro-architecture could be quad-core. "Zen" will be AMD's first monolithic core design after a stint with multi-core modules, with its "Bulldozer" architecture. Our older article details what sets Zen apart from its predecessor. As expected, in a multi-core chip, Zen cores share no hardware resources with each other, than a last-level cache (L3 cache), much like Intel's current CPU architecture.

There's just one area where Zen will differ from Haswell. With Haswell, Intel has shown that it can clump any number of cores on a chip, and make them share a proportionately large L3 cache. Haswell-E features 8 cores sharing a 20 MB cache. The Haswell-EX features 18 cores sharing 45 MB of cache. With Zen, however, the scale up stops at 4 cores sharing 8 MB of L3 cache. A set of four cores makes up what AMD calls a "quad-core unit." To be absolutely clear, this is not a module, the cores share no hardware components with each other, besides the L3 cache.



For AMD to build chips with more than 4 cores, the company will have to scale up the number of such "quad-core units." A mainstream APU will likely feature just one unit, with four cores. A high-end desktop chip will likely feature two units, making up 8 cores, and 16 MB of total L3 cache, 8 MB shared between four cores, each. Bigger enterprise Opteron chips could take that count up to 4 units, making up 16 cores, and 32 MB of L3 cache. What also makes this "quad-core unit" different from a module is that it's divisible. You can, in theory, carve out dual-core parts using these units.

AMD's clumping four cores together appears to be a harvesting measure, much like Intel's Haswell silicon. Even a Core i3-4160 dual-core chip features a silicon with four physical cores, but two disabled. Which two get disabled depends on either random selection (if all four cores are perfect) or on which two cores are most functional. So a dual-core "Haswell" has a combination of any two of the cores physically present. The 8 MB of L3 cache on a Haswell silicon has ring-stops that allow SKU designers to let the CPU address 2 MB, 3 MB, 4 MB, 6 MB, or all 8 MB of it.

How AMD plans to package these chips, remains a mystery. We've heard too many reports eulogizing AM3+, and AMD's inefficient 3-chip platform design, which Intel junked way back in 2008, with its X58 HEDT platform. One could imagine AMD to come up with a new high-end desktop processor package, which lacks integrated graphics on its silicon, but crams in eight cores, 16 MB of cache, a dual-channel DDR4 IMC, and a 40-lane PCI-Express gen 3.0 root complex, if not 24-lane, like its APU counterparts. The current FM2+ socket looks ready for "Zen" based mainstream/performance APUs from a technical standpoint.

The key to "Zen" success, however, is AMD getting the energy-efficiency right, and for that, it's betting heavily on foundry-partner GlobalFoundries to get its 14 nanometer FinFET node up and running. This report from Expreview suggests that the company's Dresden-based facility is just about ready with its 14 nm node.

View at TechPowerUp Main Site
 
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So, essentially a similar technique to what Intel used in their Core 2 Quads in which two Core 2 dies were placed within a single package? Interesting.
 

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So, essentially a similar technique to what Intel used in their Core 2 Quads in which two Core 2 dies were placed within a single package? Interesting.

Two quad-core units can be placed on a single die (just as four Bulldozer modules are placed on a single Zambezi die), and share all the uncore components (IMC, iNB). They won't be multi-chip modules like Intel Core 2 Quad.
 
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Two quad-core units can be placed on a single die, and share all the uncore components (IMC, iNB). They won't be multi-chip modules like Intel Core 2 Quad.

Ah, thanks for clearing that up. I was initially thinking that, but with the segregation of L3 between the units, I thought it might have been multi-chip. However, thinking about that again, it would be harder to integrate the uncore if the units did not share a die.
 
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junked way back, with its X58 HEDT platform

Hey... I liked that platform... it sounds harsh
 

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For AMD to build chips with more than 4 cores, the company will have to scale up the number of such "quad-core units." A mainstream APU will likely feature just one unit, with four cores. A high-end desktop chip will likely feature two units, making up 8 cores, and 16 MB of total L3 cache, 8 MB shared between four cores, each. Bigger enterprise Opteron chips could take that count up to 4 units, making up 16 cores, and 32 MB of L3 cache.
This approach looks like a form of segmentation to me, so I wonder if it limits performance in some way?

Regardless, this design certainly looks reasonably promising at delivering genuinely competitive CPUs.
 
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Perhaps the reason L3 cache is part of their module design is because it's connected to the individual L2 caches of each 4 cores and shared out. This would mean though that it's no longer a level 3 cache in that it's not fully shared between all the cores. I'm more interested in the K12 chips. The ARM high performance chips will most likely be faster than Zen due to the ARM V8_R architecture being inherently more efficient for using less decode logic and more registers.
 
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1 - "all four cores form a unit"
2 - "multiple units can be combined for even greater performance"

So does this mean Zen supports a multi socket motherboard?
 
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1 - "all four cores form a unit"
2 - "multiple units can be combined for even greater performance"

So does this mean Zen supports a multi socket motherboard?

I read on wccftech that Zen will indeed support multi socket motherboard, at least on servers (opteron machine with 32 Zen cores might be interesting)
 
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i really hope this will turn out to be a good move for AMD, we need competition in the upper segment of the CPU market.
 
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The Zen cores will be used across the entire AMD product line in both discrete CPUs and APUs for both consumer and enterprise. Zen was designed from the ground up to meet the performance and power consumption requirements of many segments. The max discrete CPU TDP is 95w for an 8-core. The Zen cores offer a tremendous variety of configuration options. As will be demonstrated there are no performance losses with the 4-core modular building block design.
 
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This all sounds promising but we need some more information to make final judgment. Though at this point I am sure it will be better than what we currently have mostly because there is a lot less sharing between the cores.
 
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I would be VERY interested in the HEDT version of this new generation of chip. I'd cut off my left leg to see AMD punch Intel in the face with taking the performance crown if only for a moment.
 
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Fyeah. If only AMD would price it at around 50$ and that 390x at 300$... man, thats what we all want right, for AMD to make some money...
/s
 
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Fyeah. If only AMD would price it at around 50$ and that 390x at 300$... man, thats what we all want right, for AMD to make some money...
/s
Lol Good one :D
 
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The Zen cores will be used across the entire AMD product line in both discrete CPUs and APUs for both consumer and enterprise. Zen was designed from the ground up to meet the performance and power consumption requirements of many segments. The max discrete CPU TDP is 95w for an 8-core. The Zen cores offer a tremendous variety of configuration options. As will be demonstrated there are no performance losses with the 4-core modular building block design.

You're either the most ridiculous AMD fanboy out there, or you work for AMD. Half your posts look like promotional copy straight from AMD.
 
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The competition helps the market, otherwise a cpu cost as a kidney. However, AMD has to let out competitive products. I offer my best wishes to AMD hoping to come back for the sake of competitive PC and consumer.
 
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Fyeah. If only AMD would price it at around 50$ and that 390x at 300$... man, thats what we all want right, for AMD to make some money...
/s

Lol Good one :D

It certainly wouldn't be a first time that lowering the price results in higher profits based on number of products sold ... but alas, AMD is selling their products with slim margins already, so yeah, based on how good the performance of early samples is, prices will be set to match intel's performance/price levels ... then cue the price drop game between them for all the joy of the consumers :clap:
 
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It certainly wouldn't be a first time that lowering the price results in higher profits based on number of products sold ... but alas, AMD is selling their products with slim margins already, so yeah, based on how good the performance of early samples is, prices will be set to match intel's performance/price levels ... then cue the price drop game between them for all the joy of the consumers :clap:

The moment AMD match Intel's prices. Intel would increase their prices next day.

Intel have positioned themselves as the "quality and premium" brand so they'll always price themselves higher.
 

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I would be VERY interested in the HEDT version of this new generation of chip. I'd cut off my left leg to see AMD punch Intel in the face with taking the performance crown if only for a moment.

Probably not going to happen. What Intel has that they could release for the HEDT market, but don't, makes AMD catching up in this area almost impossible in just one generation. I mean, Intel has a 18-Core beast they could bring out if the needed too.
 
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I'm so fed up with "Intel being the best" (even if it's true).
Let's hope AMD won't make a mess, again. If that's so I'll build an all red build next year.
 
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So everyone missed the change to an inclusive cache design?

Also the link is wrong. It's not Tom's but Anand's forum.
 
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