Raevenlord
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TSMC (Taiwan Semiconductor Manufacturing Co.), one of the foremost semiconductor producers in the world - which controls a leading 55% share of the global market - said on Wednesday it plans to build a new, $15.7 billion facility in Taiwan that would churn out 5 nm and 3 nm chips. If TSMC were to achieve these production nodes in a timely fashion (with "timely" meaning "before their competitors"), that would prove a huge boon for the company, as everyone - and especially deep-pocketed smartphone chip designers such as Apple and Qualcomm - is looking towards evolution in process nodes, which allows for improvements in power consumption, performance, size and cost of chips per wafer.
"We're asking the government to help us find a plot that is large enough (123 to 197 acres) and has convenient access so we can build an advanced chip plant to manufacture 5 nm and 3 nm chips," TSMC spokesperson Elizabeth Sun said. The spokesperson declined to provide details about the timing of the construction and production, though it's seemingly still a few years away (yet close enough for it to merit an official request). TSMC co-CEO Mark Liu had already mentioned that the company was working on 5 nm chips, and had assigned the task of developing 3 nm technology and conducting research on 2 nm technology to upwards of 300 engineers. Delays on EUV (Extreme Ultraviolet) lithography have slowed expected advancements in further miniaturization of the process nodes. It remains to be seen which technology TSMC is counting on towards aiding them in their goals for 5 nm, 3 nm and the mentioned 2 nm chip production, especially since at those sizes, we start leaving the usual realm of plane old physics, crossing the threshold towards their exotic cousins, quantum physics.
View at TechPowerUp Main Site
"We're asking the government to help us find a plot that is large enough (123 to 197 acres) and has convenient access so we can build an advanced chip plant to manufacture 5 nm and 3 nm chips," TSMC spokesperson Elizabeth Sun said. The spokesperson declined to provide details about the timing of the construction and production, though it's seemingly still a few years away (yet close enough for it to merit an official request). TSMC co-CEO Mark Liu had already mentioned that the company was working on 5 nm chips, and had assigned the task of developing 3 nm technology and conducting research on 2 nm technology to upwards of 300 engineers. Delays on EUV (Extreme Ultraviolet) lithography have slowed expected advancements in further miniaturization of the process nodes. It remains to be seen which technology TSMC is counting on towards aiding them in their goals for 5 nm, 3 nm and the mentioned 2 nm chip production, especially since at those sizes, we start leaving the usual realm of plane old physics, crossing the threshold towards their exotic cousins, quantum physics.
View at TechPowerUp Main Site
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