Toshiba Develops 96-layer BiCS FLASH with QLC Technology

[btarunr]

Toshiba Memory Corporation, the world leader in memory solutions, today announced that it has developed a prototype sample of 96-layer BiCS FLASH, its proprietary 3D flash memory, with 4-bit-per-cell (quad level cell, QLC) technology that boosts single-chip memory capacity to the highest level yet achieved.Toshiba Memory will start to deliver samples to SSD and SSD controller manufacturers for evaluation from the beginning of September, and expects to start mass production in 2019.

The advantage of QLC technology is pushing the bit count for data per memory cell from three to four and significantly expanding capacity. The new product achieves the industry's maximum capacity of 1.33 terabits for a single chip which was jointly developed with Western Digital Corporation. This also realizes an unparalleled capacity of 2.66 terabytes with a 16-chip stacked architecture in one package. The huge volumes of data generated by mobile terminals and the like continue to increase with the spread of SNS and progress in IoT, and the need to analyze and utilize that data in real time is expected to increase dramatically. That will require even faster than HDD, larger capacity storage and QLC products using the 96-layer process will contribute a solution.



A packaged prototype of the new device will be exhibited at the 2018 Flash Memory Summit in Santa Clara, California, USA from August 6th to 9th.

Looking to the future, Toshiba Memory will continue to improve memory capacity and performance and to develop 3D flash memories that meet diverse market needs, including the fast expanding data center storage market.

View at TechPowerUp Main Site

 

[TheLostSwede]

So this will be capable of how many P/E cycles? Are we going back to planar TLC type levels of 1-3k?
This might be acceptable for SD cards, but not eMMC or SSDs.

 

[cucker tarlson]

I wonder what has better durability, 96-layer qlc or 48-layer tlc like you find on 850 evo.

 

[Jonathan Marcus]

So this will be capable of how many P/E cycles? Are we going back to planar TLC type levels of 1-3k?
This might be acceptable for SD cards, but not eMMC or SSDs.

When Toshiba developed the first MLC after SLC, this question was the biggest concern of the people.
But after a while, MLC became to be used for the Enterprise and Mission critical works.
Nowadays when you look at the product portfolio of the SSD manufacturers you will see nearly all the high end SSDs are MLC based.
We are not writing terabytes of data everyday.
Read endurance is unlimited for the SSDs.
So, for consumer use I do not think that QLC will cause problems.
Locate a 3D SSD into your laptop / PC and install your OS and forget everything & enjoy it.
Even the worst SSD is much better than the best HDD.

 

[R0H1T]

So this will be capable of how many P/E cycles? Are we going back to planar TLC type levels of 1-3k?
This might be acceptable for SD cards, but not eMMC or SSDs.

IIRC the best case estimates put it in the region of 1k atm, without write amplification. With better error correction & controller level hacks, it could possibly reach 1.5-2k in the future.

I wonder what has better durability, 96-layer qlc or 48-layer tlc like you find on 850 evo.

Most likely the 850 EVO btw it has nothing to do with 96L or 48L in case you're wondering, but a 10TB QLC should have better endurance than 1TB TLC drive.

 

[cucker tarlson]

Then why samsung rates their 64-layer nand for higher TBW than their 48-layer nand ?

 

[R0H1T]

Then why samsung rates their 64-layer nand for higher TBW than their 48-layer nand ?

TBW was really conservative for first gen 3d NAND EVO, IIRC endurance was estimated to be in the region of 5k p/e cycles (I could be wrong) & they upped the TBW rating next gen. It might have more to do with handling a first gen product, improving upon it & then the second gen was refined (only marginally) in terms of density & performance. The p/e cycles I've not seen increase at all on 64L, neither does 96L do that.

 

[TheLostSwede]

Obviously technology moves forward, one way or another, but MLC still had 40K P/E cycles, which is "good enough" for consumers. Admittedly TLC seems to be good enough for some use cases, the 1-3k P/E cycle is something I would be concerned about. A friend of mine already has already had his 960GB TLC drive fail. He used it for music production, which apparently caused too much data to be written to the drive. 3D TLC got us back up to MLC level or even slightly better P/E cycles, but QLC now seems to drop us straight back to TLC level cycles. I'm at least personally going to steer clear of QLC until it's proven to be a reliable technology.

 

[cucker tarlson]

There's good tlc and there's crap mlc, there will be good and bad qlc.

 

[trparky]

Obviously technology moves forward, one way or another, but MLC still had 40K P/E cycles, which is "good enough" for consumers. Admittedly TLC seems to be good enough for some use cases, the 1-3k P/E cycle is something I would be concerned about. A friend of mine already has already had his 960GB TLC drive fail. He used it for music production, which apparently caused too much data to be written to the drive. 3D TLC got us back up to MLC level or even slightly better P/E cycles, but QLC now seems to drop us straight back to TLC level cycles. I'm at least personally going to steer clear of QLC until it's proven to be a reliable technology.

If this friend of yours is writing that much data per day, then yes... MLC is definitely the way to go. However, for the majority of us who have systems with datasets on our system SSDs that stay relatively unchanged TLC is good enough.

 

[CheapMeat]

1K to 3K P/E cycles is still WAAAY better the the predicated (years ago) P/E cycles of just 100. I'm all in for QLC drives to take up bulk storage. Even at 1K P/E cycles, they'll last and endure better than probably any HDD. And with 96 layers and lots of over provisioning and strong ECC, I'm not worried. If we're talking about these QLC drives being the ONLY drive in a system, then yes, might be a worry. But I want these for mass storage.


https://www.zdnet.com/article/ssd-endurance-death-by-petabyte/

The Samsung 840 250GB - using three-level cells that have lower endurance than MLC - was the next to fail at over 900TB

 

[Arjai]

The new product achieves the industry's maximum capacity of 1.33 terabits for a single chip which was jointly developed with Western Digital Corporation, also, the world leader in memory solutions.

You forgot this part.

Also, so nobody feels confused by this thread, "RGB".

You're welcome.

 

[R-T-B]

Then why samsung rates their 64-layer nand for higher TBW than their 48-layer nand ?

In NAND, a larger process node helps with endurance of the cells. So more layers means they can afford to use a larger process in the same space.

So yes, it is related.