Intel Core i9 8-core LGA1151 Processor Could Get Soldered IHS, Launch Date Revealed

[Deleted member 178884]

I'm not sure whether you're serious or not, but this is the exact reason why many of us wanted soldered CPUs especially unlocked ones.

Some Intel fans on the other hand danced around with this idea that Intel couldn't do it because ~

• it'd cost way too much? nope
• the solder would not be effective long term? Xeons say hello
• worst of all you couldn't solder them all because the chip was tiny! 9900k

AMD doesn't solder RR, they solder everything else AFAIK, unlike Intel.

Yes I am - £20 to get your cpu soldered is worth it, most delid services cost £20+ for 2066 cpus and after that they should standardise it, my x5650 is soldered whilst all my other cpus aren't.

 

[Prima.Vera]

Guessing next year will finally be the year to get an upgrade after 7 (seven) years (i9 -9700K + 1180Ti + DDR4 + NVMe drive)

 

[newtekie1]

worst of all you couldn't solder them all because the chip was tiny!

This was kind of the only legit reasoning. There was a really good article about the challenges of soldering a small die. The issue is when the solder cools and slightly contracts, it actually pulls on the IHS and die. You have to have really good adhesion to both, or the solder can actually separate from the die or IHS. The more surface area you have to attach to, obviously the better adhesion you can get. So smaller dies are harder to solder.

But now with the 8-core dies of the 9900k, it likely is a big enough die to make soldering easy enough for Intel to do it. And the switch from solder to TIM was also a fault of Intel's stagnation, sticking with the same 4-core die for so long, and just doing process shrinks, lead to very small physical cores. If they had move the mainstream up sooner, like they should have, then the dies would have been large enough to make solder a viable option.

AMD doesn't solder RR, they solder everything else AFAIK, unlike Intel.

So not the entire series then.

 

[Valantar]

Except AMD doesn't. But who cares about pesky details like that, right?

They do, actually. Not the APUs, but those are based off a different die. As such, they're not from the same wafers - and thus don't apply to what I was describing.

 

[phill]

Do you really have a need for more than the 40 PCI-E 3.0 lanes that the 1151 platform provides?

Except AMD doesn't. But who cares about pesky details like that, right?

I suppose it would depend if you have SLI, M.2 drives and the like.. I'm not sure I understand the logic behind limiting the lanes if CPUs that cost the same money or less have them all unlocked but I suppose that's how they get you to buy the higher spec models..
I think the 5820k had 28 lanes, so did the 5930k? Was it the 5960X that only had the full 40 lanes? Same went for the 6xxx series and such I believe. I don't think it was until the 5xxx series CPUs that the limitation was brought in was it?

 

[R0H1T]

This was kind of the only legit reasoning. There was a really good article about the challenges of soldering a small die. The issue is when the solder cools and slightly contracts, it actually pulls on the IHS and die. You have to have really good adhesion to both, or the solder can actually separate from the die or IHS. The more surface area you have to attach to, obviously the better adhesion you can get. So smaller dies are harder to solder.

But now with the 8-core dies of the 9900k, it likely is a big enough die to make soldering easy enough for Intel to do it. And the switch from solder to TIM was also a fault of Intel's stagnation, sticking with the same 4-core die for so long, and just doing process shrinks, lead to very small physical cores. If they had move the mainstream up sooner, like they should have, then the dies would have been large enough to make solder a viable option.



So not the entire series then.

This was a possible reason but never proved to be the official company line. As for the challenges, we have 14nm Ryzen delidded, with IHS, while 22nm Haswell is not. Needless to say that Haswell is not much smaller than Ryzen, if at all. Besides that theory gets torn to shreds when talking about Intel HEDT.

As for RR, I can see ASP being the reason why AMD did this. I won't defend it but I can see why it's unsustainable, given the volumes & margin on that part.

 

[VulkanBros]

reasons?

It´s cheaper, the IHS is soldered and more often than Intel, they make new CPU´s compatible with older boards (or older boards compatible for new CPU´s - via BIOS updates) - and AMD boards tend to be cheaper - and because I like the new RyZen/ThreadRipper generation CPU´s in general.

 

[newtekie1]

They do, actually. Not the APUs, but those are based off a different die. As such, they're not from the same wafers - and thus don't apply to what I was describing.

But they are part of the same series of CPUs. So, hence, the entire series is not soldered.

I suppose it would depend if you have SLI, M.2 drives and the like.. I'm not sure I understand the logic behind limiting the lanes if CPUs that cost the same money or less have them all unlocked but I suppose that's how they get you to buy the higher spec models..
I think the 5820k had 28 lanes, so did the 5930k? Was it the 5960X that only had the full 40 lanes? Same went for the 6xxx series and such I believe. I don't think it was until the 5xxx series CPUs that the limitation was brought in was it?

Yes, but even with SLI and multiple M.2 drives, the 40 lanes that an 8700K on a Z370 motherboard provides is more than enough. Even if you've got two GPUs, and two high speed M.2 drives, that's only 24 lanes total, leaving another 16 for other devices. There is that much more you can put on a board that needs 16 lanes of PCI-E bandwidth.

This was a possible reason but never proved to be the official company line. As for the challenges, we have 14nm Ryzen delidded, with IHS, while 22nm Haswell is not. Needless to say that Haswell is not much smaller than Ryzen, if at all. Besides that theory gets torn to shreds when talking about Intel HEDT.

You can post all the off angle pictures you want, the reality is Summit Ridge die is actually significantly bigger than Ivy Bridge and Haswell. Summit Ridge is 192mm2, Ivy Bridge was only 160mm2. To give an idea, Sandy Bridge was 216mm2. So that is a pretty big jump down, and certainly a plausible reason why they decided to switch to TIM with Ivy Bridge. Moving forward after that, they just stuck with the decision, even as the dies started getting bigger again. And eventually did make the stupid move to just do TIM on everything, probably because they realized it was easier.

 

[Tsukiyomi91]

at least it's a start.

 

[FreedomEclipse]

It´s cheaper, the IHS is soldered and more often than Intel, they make new CPU´s compatible with older boards (or older boards compatible for new CPU´s - via BIOS updates) - and AMD boards tend to be cheaper - and because I like the new RyZen/ThreadRipper generation CPU´s in general.

but Intel totally smashes it in gaming still due to faster single core speed.

 

[Tsukiyomi91]

still have a whole lot higher clock speeds with all cores under full load.

 

[ShurikN]

But they are part of the same series of CPUs. So, hence, the entire series is not soldered.

It depends on what you consider a "series". uArch or naming number...
To me saying Raven Ridge and Summit Ridge are the same series of cpus is like saying the same for 7700K and 7900X. They both start with a 7, but they couldn't be any more different...

 

[R0H1T]

You can post all the off angle pictures you want, the reality is Summit Ridge die is actually significantly bigger than Ivy Bridge and Haswell. Summit Ridge is 192mm2, Ivy Bridge was only 160mm2. To give an idea, Sandy Bridge was 216mm2. So that is a pretty big jump down, and certainly a plausible reason why they decided to switch to TIM with Ivy Bridge. Moving forward after that, they just stuck with the decision, even as the dies started getting bigger again. And eventually did make the stupid move to just do TIM on everything, probably because they realized it was easier.

I said Haswell, GT2 (i7) is 177mm^2 while GT3(Iris) is 264 mm^2 so not much smaller than SR. What about the discrepancy with Intel HEDT, since they're much bigger dies?

Cheaper IMO, why would it be easier given they still make soldered CPU's & seemingly are going back to solder for the upcoming i9.

 

[Valantar]

But they are part of the same series of CPUs. So, hence, the entire series is not soldered.

No, they're not. Sure, they share a model number series. But so does Threadripper. As does Intel HEDT with Intel MSDT, for that matter. Are those also the same series? No. RR is a separate series from standard Ryzen, as shown by the entirely different die used. Intel doesn't have a comparable series (due to having iGPUs across all MSDT chips), but that doesn't change the fact that RR is not the same as other Ryzen.

Yes, but even with SLI and multiple M.2 drives, the 40 lanes that an 8700K on a Z370 motherboard provides is more than enough. Even if you've got two GPUs, and two high speed M.2 drives, that's only 24 lanes total, leaving another 16 for other devices. There is that much more you can put on a board that needs 16 lanes of PCI-E bandwidth.

For demanding uses, you really can't say that Z/H370-based systems have "40 lanes". That's only true as long as no more than 4 of the 24 from the PCH are used at one time. Sure, this is an edge case not relevant to the vast majority of users, but doubling the QPI speed would make this bottleneck go away for even heavy users with 10GbE NICs and multiple SSDs. Also, the lack of support for lane bifurcation makes those lanes (including the CPU ones) far less flexible than they ought to be.

 

[Assimilator]

Yes, but even with SLI and multiple M.2 drives, the 40 lanes that an 8700K on a Z370 motherboard provides is more than enough. Even if you've got two GPUs, and two high speed M.2 drives, that's only 24 lanes total, leaving another 16 for other devices.

Another one drinking the "40 lanes" Kool-Aid. On Z270 there are 16 lanes directly from the CPU and 24 lanes from the chipset, and the chipset talks to the CPU over a 4-lane link. That means that if you have two 4-lane M.2 SSDs hanging off the chipset, and you try to access them both at the same time (example: RAID), they are going to be bottlenecked. Furthermore, of the 24 chipset lanes at least half will already be taken by other peripherals (SATA, USB, LAN) so you will get maybe 12 lanes max off there... maybe. That's not taking into account that you get, at maximum, 16 lanes from the CPU for graphics cards - regardless of whether you have one or two GPUs.

Now, whether an effective 28 PCIe 3.0 lanes is too little for the average midrange gamer with 1 GPU and 1 M.2 drive is another story altogether.

 

[CrAsHnBuRnXp]

Why not just buy an AMD CPU.......

Like it's going to outperform Intel...

AMD has gotten way better. But not that much better.

 

[newtekie1]

It depends on what you consider a "series". uArch or naming number...
To me saying Raven Ridge and Summit Ridge are the same series of cpus is like saying the same for 7700K and 7900X. They both start with a 7, but they couldn't be any more different...

No, they're not. Sure, they share a model number series. But so does Threadripper. As does Intel HEDT with Intel MSDT, for that matter. Are those also the same series? No. RR is a separate series from standard Ryzen, as shown by the entirely different die used. Intel doesn't have a comparable series (due to having iGPUs across all MSDT chips), but that doesn't change the fact that RR is not the same as other Ryzen.

Same socket, in the same product stack = same series. It doesn't matter that they use a different die, the 2 core Intels and 4 core and 6 cores use different dies too, they are still the same series of CPUs. You are not going to be able to successfully argue that the Ryzen 5 2400G and Ryzen 5 2600 are two different series of processors. They might have different cores in them, but AMD has made them the same series. What was said would have been true back when the APUs were separate from the mainstream deaktop processor, on a complete different platform with a completely different naming scheme, but that is no longer the case. AMD has made them the same series as their traditional CPU line.

For demanding uses, you really can't say that Z/H370-based systems have "40 lanes". That's only true as long as no more than 4 of the 24 from the PCH are used at one time. Sure, this is an edge case not relevant to the vast majority of users, but doubling the QPI speed would make this bottleneck go away for even heavy users with 10GbE NICs and multiple SSDs. Also, the lack of support for lane bifurcation makes those lanes (including the CPU ones) far less flexible than they ought to be.

Another one drinking the "40 lanes" Kool-Aid. On Z270 there are 16 lanes directly from the CPU and 24 lanes from the chipset, and the chipset talks to the CPU over a 4-lane link. That means that if you have two 4-lane M.2 SSDs hanging off the chipset, and you try to access them both at the same time (example: RAID), they are going to be bottlenecked.

That isn't how it works with DMA, the data does not have to flow back to the CPU to be moved around. Every bit of data transferred over the PCI-E bus isn't going through the CPU. The data flows through the chipset, so the 4 lane connection back to the CPU is almost never a bottleneck. The only time it is really a bottleneck is for the GPUs, which is why they are wired directly to the CPU and everything else happily flows through the chipset. Have you ever looked at how the HEDT boards are wired? Those extra CPU PCI-E lanes aren't used for storage... The only other time the 4x link between the chipset and CPU is stressed is loading data from a RAID0 M.2 NVMe setup into memory(program loading, game level loading, etc.) But you still get almost 4GB/s of transfer speed from the drives into Memory. Are you really going to notice a faster transfer speed than that? Besides that, in situations where you are loading data from the drives into memory, those are almost always random read/write cases. And even the best drives on the market right now don't even break 1GB/s random read, so even if you had two in RAID0, you're not coming close to a bottleneck on the DMI link between the chipset and the CPU.

Furthermore, of the 24 chipset lanes at least half will already be taken by other peripherals (SATA, USB, LAN) so you will get maybe 12 lanes max off there... maybe.

Bull. SATA, USB, and LAN are all provided by the chipset without using any of the 24 PCI-E lanes. All the extra peripherals likely would never need 12 PCI-E 3.0 lanes, even on a high end board. You've got a sound card taking up 1 lane, maybe another LAN port taking up another, perhaps a wifi card taking up 1 more, and them maybe they add a USB3.1 controller taking 1 or maybe 2 more. Perhaps they even want to use an extra SATA controller taking 1 more. So the extras taking maybe 5 lanes, call it 6 to be safe? Certainly not half of the 24 provided.

I said Haswell, GT2 (i7) is 177mm^2 while GT3(Iris) is 264 mm^2 so not much smaller than SR. What about the discrepancy with Intel HEDT, since they're much bigger dies?

Cheaper IMO, why would it be easier given they still make soldered CPU's & seemingly are going back to solder for the upcoming i9.

My point is that Ivy Bridge was the issue. My opinion of what happened is that when they were getting Ivy Bridge ready they ran into problems with the solder, and decided to just switch to TIM instead of trying to find an engineering solution to allow them to use solder. Then they just never bothered to switch back, either because they were too lazy or they just noticed the difference in the bottom line and liked the slightly heavier wallets. The fact that they switch the HEDT over to TIM too kind of points to them liking their heavy wallets. But my point was, originally, it was because of the very much smaller die of Ivy Bridge and the challenges it presented.

 

[R0H1T]

My point is that Ivy Bridge was the issue. My opinion of what happened is that when they were getting Ivy Bridge ready they ran into problems with the solder, and decided to just switch to TIM instead of trying to find an engineering solution to allow them to use solder. Then they just never bothered to switch back, either because they were too lazy or they just noticed the difference in the bottom line and liked the slightly heavier wallets. The fact that they switch the HEDT over to TIM too kind of points to them liking their heavy wallets. But my point was, originally, it was because of the very much smaller die of Ivy Bridge and the challenges it presented.

That's exactly what I'm contesting, this was a popular theory but never proven. With the i9 the die size could be 10~20% bigger than 8700k, if Intel uses solder then there's absolutely no reason why they shouldn't have gone for solder on the unlocked hexa core ~ except saving money! Which frankly put, shows them in a very bad light.

 

[hat]

You can post all the off angle pictures you want, the reality is Summit Ridge die is actually significantly bigger than Ivy Bridge and Haswell. Summit Ridge is 192mm2, Ivy Bridge was only 160mm2. To give an idea, Sandy Bridge was 216mm2. So that is a pretty big jump down, and certainly a plausible reason why they decided to switch to TIM with Ivy Bridge.

Smaller dies have been soldered in the past. According to our own database, the C2D E6600 was even smaller than Ivy Bridge, and it was soldered.

 

[Axaion]

>(believed to be more effective in heat-transfer)


Come on now, we all know you know better, its pretty obvious solder has way better heat transfer than toothpaste

 

[newtekie1]

Smaller dies have been soldered in the past. According to our own database, the C2D E6600 was even smaller than Ivy Bridge, and it was soldered.

Interesting. I guess there goes my theory, Intel's just cheap.

 

[MxPhenom 216]

Who fucking cares about solder. The solder vs TIM debate is a dead horse that people are obsessed with beating every time a new chip comes out. Not to mention people lacking technical understanding for why chips weren't being soldered. And its not really a money grab.

Interesting. I guess there goes my theory, Intel's just cheap.

I dont think its just die size that matters. But PCB thickness too. Pcbs for intel chips got pretty thin when Haswell came. Im not sure if they stayed that way but i wouldnt be surprised.

 

[hat]

What reason is there for them not to be soldered? It's far better than paste. Better thermal transfer results in lower temps. That isn't a bad thing... especially when for the average user, many of these chips are being held back by high temps. Combine that with the rest of the cash grabby things Intel has been doing these past several years and you've got yourself one heck of a crap shoot.

 

[MxPhenom 216]

Interesting. I guess there goes my theory, Intel's just cheap.

I dont think its just die size that matters. But PCB thickness too. Pcbs for intel chips got pretty thin when Haswell came. Im not sure if they stayed that way but i wouldnt be surprised.

What reason is there for them not to be soldered? It's far better than paste. Better thermal transfer results in lower temps. That isn't a bad thing... especially when for the average user, many of these chips are being held back by high temps. Combine that with the rest of the cash grabby things Intel has been doing these past several years and you've got yourself one heck of a crap shoot.

Well lets face it. Overclocking is pretty dead with the clock speeds these chips are pushing from Turbo Boost out of the box. Because of this i dont really give a shit whats between the IHS and die.

What reason is there for them not to be soldered? It's far better than paste. Better thermal transfer results in lower temps. That isn't a bad thing... especially when for the average user, many of these chips are being held back by high temps. Combine that with the rest of the cash grabby things Intel has been doing these past several years and you've got yourself one heck of a crap shoot.

Well lets face it. Overclocking is pretty dead with the clock speeds these chips are pushing from Turbo Boost out of the box. Because of this i dont really give a shit whats between the IHS and die.

 

[Octopuss]

How about https://overclocking.guide/the-truth-about-cpu-soldering/ ?