Rumor: AMD Navi a Stopgap, Hybrid Design of RDNA and GraphicsCoreNext

[medi01]

AMD's bridgman: "You could call it a hybrid but not in that sense... we used to talk about GCN as an ISA, but it seems that most people outside AMD think of GCN as a micro-architecture instead (ie an implementation of the ISA). RDNA is GCN ISA but not what you think of as GCN architecture."

Shocking, eh?

We've known Navi is gonna be trash for months...

This week at stupid.
Brought to you by "AMD never undercut competitors like that".

The ironic part is, "they" actually "knew".
It doesn't matter what comes out, as the outcome is predefined, it's only the excuses to come to that conclusion that need to be clarified.
Mainboards from 2017 do not support PCIe4? Bad, baaaad, AMD, how dare you?

But the "it's still GCN" is the loveliest and the strongest of them all.
Even stronger than "buh mah drivars", as someone can call out BS on that.
Microarch, on the other hand, who the f*ck does anyone prove or disprove it? Or even clarify why it is bad to begin with.

570, wipes the floor with 1050, 1050Ti, 1650 and is cheaper? Ah, but it's "still GCN". Oh, and my grandma's friend's husband's neighbor has 15 years old dell which can feed GPU only via PCIe.

 

[bug]

Did a search. Found out that Nvidia didn't disclose tile-based rendering was what they used - outside hackers figured that out themselves. And TBR is a standard technique, long used for low-power GPUs, like those in mobile phones. So, since that means there's no patent stopping them, why on Earth hasn't AMD gotten around to using TBR on their GPUs?

Drivers, the eternal Achilles heel of ATI/AMD. Vega was even announced to support TBR during release, with driver support to follow "shortly".

 

[Casecutter]

Yup. Back when TSMC's 22nm node failed and everybody was stuck on 28nm, AMD kept their compute resources and tried to parallelize till they couldn't feed their hardware while Nvidia (wisely, imho), decided to cut back on compute hardware that does little for gaming. Nvidia figuring out TBR was just the nail in GCN's coffin.
AMD sticking to compute helped them during the mining boom era, so they made back some of the lost cash. But that was just a fluke.

I might say that what have said isn't entirely incorrect, but it more nuanced as for AMD it couldn't be only about gaming. AMD had/wanted to (or forced) to keep up the Professional side of market much more than gaming. As they didn't have the funds to pursue separate tacks; Lisa Su said they had to be more focused for prioritizing our investments, focus aggressively pursuing the leading-edge technologies that change the world (aka holding off on Gaming).

When Nvidia snuck-in TBR with Maxwell it was a bad day for AMD. I don't know who miss that in 2014 (Raja), or why it didn't get it into Ellesmere/Polaris (GCN 4.0) July 2016, or sure who didn't spend time constructing the drivers. As by Aug 2017 Vega they should have found a team that could implement that. You maybe correct in "Achilles heel", or they didn't have the resources (people/money) to spend given the chip were still compute heavy (Professional focused) and might still not provide the utmost efficiency (And they'd still look bad).

It would be interesting if AMD/RTG can get Tiled rendering in Navi.

 

[bug]

@Casecutter Removing some double precision hardware from the consumer line isn't all that expensive. Putting back in something that actually benefits gaming might just be, however.

Anyway, the days of being cash strapped should be coming to an end for AMD, I was really hoping they'd be done with stopgap solutions.

 

[Fatalfury]

i believe this is enough for feeding the fanboys after Navi releases... so that they can play their familiar game -"The Waiting Game"

 

[medi01]

i believe this is enough for feeding the fanboys after Navi releases... so that they can play their familiar game -"The Waiting Game"

Because some cryptic acronyms with ambiguous meaning, not actual performance, is what matters.