AMD to Cough Up $12.1 Million to Settle "Bulldozer" Core Count Class-Action Lawsuit

[btarunr]

AMD reached a settlement in the Class Action Lawsuit filed against it, over alleged false-marketing of the core-counts of its eight-core FX-series processors based on the "Bulldozer" microarchitecture. Each member of the Class receives a one-time payout of USD $35 per chip, while the company takes a hit of $12.1 million. The lawsuit dates back to 2015, when Tony Dickey, representing himself in the U.S. District Court for the Northern District of California, accused AMD of false-marketing of its FX-series "Bulldozer" processor of having 8 CPU cores. Over the following four years, the case gained traction as a Class Action was built against AMD this January.

In the months that followed the January set-up of a 12-member Jury to examine the case, lawyers representing the Class and AMD argued over the underlying technology that makes "Bulldozer" a multi-core processor, and eventually discussed what a fair settlement would be for the Class. They eventually agreed on a number - $12.1 million, or roughly $35 per chip AMD sold, which they agreed was "fair," and yet significantly less than the "$60 million in premiums" consumers contended they paid for these processors. Sifting through these numbers, it's important to understand what the Class consists of. It consists of U.S. consumers who became interested to be part of the Class Action, and who bought an 8-core processor based on the "Bulldozer" microarchitecture. It excludes consumers of every other "Bulldozer" derivative (4-core, 6-core parts, APUs; and follow-ups to "Bulldozer" such as "Piledriver," "Excavator," etc.).


Image Credit: Taylor Alger

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[Space Lynx]

tsk tsk AMD.

 

[RichF]

Ridiculous.

1) Meritless suit.

2) Only covers California purchases.

3) Doesn't even cover all of the 8 core consumer-grade FX chips.

 

[biffzinker]

Always seen the first FX 8150 as nothing more than a Quad core with additional haradware to give the SMT extra punch when it could deliver.

 

[RichF]

Always seen the first FX 8150 as nothing more than a Quad core with additional haradware to give the SMT extra punch when it could deliver.

Intel's CPUs with hyperthreading enabled, since Nehalem, don't actually have the claimed thread count because hyperthreading has to be disabled because it's a fundamentally insecure implementation.

Intel's CPUs with hyperthreading enabled, on the market after hyperthreading's insecurity (which requires disabling hyperthreading to fix) was made public don't actually have the claimed thread count — because hyperthreading has to be disabled because it's a fundamentally insecure implementation.

CPUs, including Intel CPUs, that don't have AVX-512 enabled or included aren't real CPUs. They simply don't have real cores. Real cores have to have AVX-512.

CPUs that don't have AVX-512 enabled or included aren't real CPUs if they came out after Intel's first consumer-grade CPU with AVX-512 hit the market. These imitation CPUs don't have real cores. Real cores have AVX-512.

CPUs that don't have the ability to process AVX-256 in a single cycle aren't real CPUs.

These are the kind of claims that fit right in with this lawsuit and how you see the FX 8150. They are arbitrary decisions made by the viewer, not backed by reality. (The only one of those claims with any teeth is the claim that Intel shouldn't be selling hyperthreading CPUs with an insecure implementation under the claimed thread count, unless it can be proven that Intel withheld knowledge of its hyperthreading insecurity for a number of years, in which case earlier CPUs would also be relevant. I am including this claim in my sample, though, to illustrate a few points that I think people can figure out on their own, given the context.)

The FPU count of a core is an arbitrary matter. Many CPUs have been sold that didn't even have FPUs. No CPUs have ever been sold that only have FPU cores, which is why counting the number of integer cores is non-arbitrary.

 

[sutyi]

tsk tsk AMD.

Bulldozer and it's iterations trough out the years had modules with two pipelines in them, so technically they did sell people said amount of processing cores albeit some of the front end and FP was shared.
Guess you can view these modules as double wide INT pipelines and call these 4C/8T instead of 8C/8T, but that would not be completely true now would it?

Did AMD lie about the architecture? Not really. Block diagrams show whats what. G
Did AMD lie about core counts? Bit of grey area depending on how one views the architecture as a whole.
Was Bulldozer uarch good? Hell no.
Does this entitle anyone to get money back cause they had chosen poorly even after the reviews? Not really at least in my opinion.

But seemingly you can sue back money if you band together with other people who had bought into FX even after reading trough the benchmarks, not once but even after years of Excator and Piledriver reviews.
'Murica at work right there.

 

[LDNL]

These class actions are disgrace. Nobody wins exept the lawyers. There should be a real punishment system to get companies to follow to rule of law. These "settlements" are not even a slap on the wrist.

 

[RichF]

These class actions are disgrace. Nobody wins exept the lawyers. There should be a real punishment system to get companies to follow to rule of law. These "settlements" are not even a slap on the wrist.

You've already pointed to other people (not just lawyers) winning via these suits. Look at your post again. Who benefits from slaps on wrists? Not just lawyers. Lawyers are easy to blame but they're not the cause of the system of justice we have, certainly not the sole cause.

The system benefits the wealthy who don't care about the environment. In a nutshell.

 

[Frick]

Intel's CPUs with hyperthreading enabled, since Nehalem, don't actually have the claimed thread count because hyperthreading has to be disabled because it's a fundamentally insecure implementation.

Intel's CPUs with hyperthreading enabled, on the market after hyperthreading's insecurity (which requires disabling hyperthreading to fix) was made public don't actually have the claimed thread count — because hyperthreading has to be disabled because it's a fundamentally insecure implementation.

CPUs, including Intel CPUs, that don't have AVX-512 enabled or included aren't real CPUs. They simply don't have real cores. Real cores have to have AVX-512.

CPUs that don't have AVX-512 enabled or included aren't real CPUs if they came out after Intel's first consumer-grade CPU with AVX-512 hit the market. These imitation CPUs don't have real cores. Real cores have AVX-512.

CPUs that don't have the ability to process AVX-256 in a single cycle aren't real CPUs.

These are the kind of claims that fit right in with this lawsuit and how you see the FX 8150. They are arbitrary decisions made by the viewer, not backed by reality. (The only one of those claims with any teeth is the claim that Intel shouldn't be selling hyperthreading CPUs with an insecure implementation under the claimed thread count, unless it can be proven that Intel withheld knowledge of its hyperthreading insecurity for a number of years, in which case earlier CPUs would also be relevant. I am including this claim in my sample, though, to illustrate a few points that I think people can figure out on their own, given the context.)

The FPU count of a core is an arbitrary matter. Many CPUs have been sold that didn't even have FPUs. No CPUs have ever been sold that only have FPU cores, which is why counting the number of integer cores is non-arbitrary.

I like to define a core as something a real man uses. I has cores, but not many, but after my core enhancement surgery I’ll be loaded with the bastards.

Anyway. Yawn. I don’t agree with this. Also wasn’t there a time when Windows displayed the 8xxx cpu’s as quad cores with SMT?

 

[Space Lynx]

Bulldozer and it's iterations trough out the years had modules with two pipelines in them, so technically they did sell people said amount of processing cores albeit some of the front end and FP was shared.
Guess you can view these modules as double wide INT pipelines and call these 4C/8T instead of 8C/8T, but that would not be completely true now would it?

Did AMD lie about the architecture? Not really. Block diagrams show whats what. G
Did AMD lie about core counts? Bit of grey area depending on how one views the architecture as a whole.
Was Bulldozer uarch good? Hell no.
Does this entitle anyone to get money back cause they had chosen poorly even after the reviews? Not really at least in my opinion.

But seemingly you can sue back money if you band together with other people who had bought into FX even after reading trough the benchmarks, not once but even after years of Excator and Piledriver reviews.
'Murica at work right there.

You misunderstand, I actually don't care either way, I mean tsk tsk as in AMD's legal department wasn't smart enough to prevent this sort of thing to begin with. I'm sure Nvidia consults many lawyers over every tiny little detail, but even then they aren't perfect, aka the .5 gb of vram debate LOL nvidia lost that one in a lawsuit too

these things are going to happen in this industry, they happen to all of them, I honestly don't think it has anything to do with deceit really. /shrug most people go to work 9 to 5, they don't live and breathe this stuff like a lot of us here do... also /reddit showerthoughts - maybe these companies should hire us as consultants LOL

 

[GreiverBlade]

Always seen the first FX 8150 as nothing more than a Quad core with additional hardware to give the SMT extra punch when it could deliver.

but there was 8 Physical core .... only the FP, scheduler was shared ... so it was a octacore no matter how you look at it, which in term of performance it gave them 80% of a octacore so basically just like a hexacore but with 8 Physical cores, extra hardware core are a core.

 

[FordGT90Concept]

This post...

How many "cores" do you see in this picture?

How many in this picture?

Remember, Feng's slides saying "core replication obvious." The defense has the uphill battle here, not the plaintiff. The pictures above make the plaintiff's case as plain as day. Honestly, AMD is better off settling out of court.

…totally called it, especially that last sentence.

AMD could never win this argument without changing over a decade of precedents including by competitors like Sun, ARM, IBM, Intel, and even themselves (Athlon 64 X2). "Integer core" got lost in marketing translation to become something it isn't, a "core." If AMD accurately advertised the product as having "8 integer cores" this lawsuit would have never been filed.

 

[seronx]

Always seen the first FX 8150 as nothing more than a Quad core with additional haradware to give the SMT extra punch when it could deliver.

In which, you are wrong.

Bulldozer and it's iterations trough out the years had modules with two pipelines in them, so technically they did sell people said amount of processing cores albeit some of the front end and FP was shared.
Guess you can view these modules as double wide INT pipelines and call these 4C/8T instead of 8C/8T, but that would not be completely true now would it?

Bulldozer and forwards are dual-core modules, or monolithic dual-cores without the glue. The front-end, floating-point unit, and L2 unit might be shared, but they are heavily optimized for dual-core(thus, dual-threaded) functionality.

 

[FordGT90Concept]

Bulldozer and forwards are dual-core modules, or monolithic dual-cores without the glue. The front-end, floating-point unit, and L2 unit might be shared, but they are heavily optimized for dual-core(thus, dual-threaded) functionality.

Nope, the "modules" are in fact dual-thread cores (see second point #5 in the quote below: Core Interface Unit). Cores are wholistic CPUs which "integer cores" are not:

Maybe you can't, but I (and others) did, repeatedly. Have a recap:
1. Shared fetcher.
2. Depending on iteration, shared decoder.
3. Depending on iteration, shared dispatcher.
4. Shared floating point units.
5. Shared Core Interface Unit.
...we also got into why these are a problem:
1. The fetcher is incapable of saturating the ALUs in a lot of cases where it has to service both integer clusters. Thuban was able to in the same scenarios.
2. + 3. AMD choose to split the decoder and dispatcher for reasons revolving around power efficiency and performance.
4. AMD was really fixated on the idea that GPUs would take over FPU so, per thread, Bulldozer really offers no improvement over Thuban. Because collisions can happen, in practice it can be slower.
5. All communication with the rest of the system flows through this unit. Windows 10 sees the Core Interface Unit and believes it is looking at a core. It looks at the fetcher offering to take two threads and interprets that as two logical processors.

Overall, a Bulldozer module is a lot of transistors short of a dual-core. That was their intent, after all.

This is evidenced in various benchmarks that show under many load conditions, Bulldozer's performance plummets compared to Thuban cores (predating Bulldozer). Either advertising on Thuban was wrong, or Bulldozer is wrong. Thuban fit the mold of what is a core, Bulldozer does not; ergo, Bulldozer was misrepresented, not Thuban.

 

[seronx]

Nope, the "modules" are in fact dual-thread cores.

Nope, the dual-core modules are in fact two single-thread cores.

=> Each core is dedicated to a thread and contains a four-wide integer execution unit, issue/retire logic, 16-KB four-way set associative L1data cache, and a load/store unit.
Of which there are two.

Cores are wholistic CPUs which "integer cores" are not. This is evidenced in various benchmarks that show under many load conditions, Bulldozer's performance plummets compared to Thuban cores (predating Bulldozer). Either advertising on Thuban was wrong, or Bulldozer is wrong. Thuban fit the mold of what is a core, Bulldozer does not; ergo, Bulldozer was misrepresented, not Thuban.

None of this proves what you have stated.

1. The fetcher is incapable of saturating the ALUs in a lot of cases where it has to service both integer clusters. Thuban was able to in the same scenarios.
2. + 3. AMD choose to split the decoder and dispatcher for reasons revolving around power efficiency and performance.
4. AMD was really fixated on the idea that GPUs would take over FPU so, per thread, Bulldozer really offers no improvement over Thuban. Because collisions can happen, in practice it can be slower.

1. 4 macro-ops goes to 4 ALUs+4 AGUs
2. The split decoder is 2 macro-ops for 2 ALUs+2 AGUs.
3. The FPU has 2x 128-bit FMACs + 2x 128-bit MMXs; 2x the FMA capability and 2x the FMISC capability compared to Thuban.

 

[FordGT90Concept]

Cores share nothing other than memory ("core replication is obvious"). Bulldozer violates that by sharing fetchers, decoders, dispatchers, and Core Interface Unit. That's shared logic, not just memory.

 

[RichF]

Anyway. Yawn. I don’t agree with this. Also wasn’t there a time when Windows displayed the 8xxx cpu’s as quad cores with SMT?

Windows has bugs so you'll have to come up with a stronger argument. It's common for software, from CPU-Z to Sandra to anything else that displays spec info — to get those specs wrong until the software is fully updated.

Windows had never seen a CPU with Bulldozer's configuration before. There is also the matter of arbitrary/political choices made by coders and their managers.

Cores share nothing other than memory.

Citation please.

 

[seronx]

Cores share nothing other than memory. Bulldozer violates that by sharing fetchers, decoders, dispatchers, and Core Interface Unit. That's shared logic, not just memory.

Um no.

A core only needs an instruction bus, a control unit, a datapath, and a data bus.

https://img.techpowerup.org/190828/core-replication-is-obvious.png

 

[PanicLake]

What a shitty money grab law suit.

 

[FordGT90Concept]

Citation please.

It's all in this thread:

Bulldozer Core-Count Debate Comes Back to Haunt AMD

AMD in 2012 launched the FX-8150, the "world's first 8-core desktop processor," or so it says on the literal tin. AMD achieved its core-count of 8 with an unconventional CPU core design. Its 8 cores are arranged in four sets of two cores each, called "modules." Each core has its own independent...

www.techpowerup.com

I'm not going to reargue all this when it's been settled.


Here's the specific quote though, just for you (page 11):

http://accel.cs.vt.edu/files/lecture2.pdf

 

[Deleted member 163934]

The FPU count of a core is an arbitrary matter. Many CPUs have been sold that didn't even have FPUs. No CPUs have ever been sold that only have FPU cores, which is why counting the number of integer cores is non-arbitrary.

When "Bulldozer" was released how many PC CPUs (sold as new) had less FPU cores count compared to integer cores?

"Bulldozer" architecture was and still is a disgrace.
The FX-4100 running at 3,6Ghz (can boost to 3,8 Ghz) is advertised as a 4 cores cpu.
Athlon II x4 640 is running at 3 Ghz (no boost) and is a 4 cores cpu.
Main problem is that in single-threaded performance the FX-4100 is scaling worst that the Athlon II x4 640 and in term of multi-threaded performance the FX-4100 is actualy worst than the Athlon II x4 640.
So basicaly we had a newer architecture that had worst performance/clock compared to the older architecture. This is something that you see during development phase. So what's the point to push on the market a product that sucks compared to the older architecture?!?

Why AMD insisted with the Faildozer revisions is beyond my understanding. At that time the only real solution to upgrade from a K10 family cpu was an Intel CPU (visible in their shitty market share during Faildozer era).

If it was me taking the call at AMD after seeing how crap is the Faildozer architecture I would had see if it's possible to actually get a bit higher clocks from K10 family and add SSE 4.1/4.2 and AVX and actually try to work on a new CPU architecture (trust me without a single person that took part in the development of Faildozer).

Not really related to this topic. I kinda got tired and sick of people praising/defending AMD. They kinda forget that AMD actually wanted to sell Faildozer at some prices that have nothing to do with the reality of that architecture, that in Windows case AMD drivers were and still are pure junk, that AMD decided to no longer release drivers for Win 8.1 an use that still has more than 3 years to live, that each Ryzen release iteration has been full of problems (you kinda expect the 3rd iteration to be smooth but well not in AMD case... most likely because they just rush the products on the market without real testing something that I said about AMD 7 years ago). I'm not bashing AMD, just pointing to problems that AMD just doesn't care! I don't like Intel or Nvidia, the deal is that Intel, Nvidia and AMD have all 3 shady marketing technique (people accused NVIDIA of crippling the performance of older architectures in drivers, if you think AMD is better maybe you should check better because AMD might had done something that is far worst).

 

[FordGT90Concept]

Why AMD insisted with the Faildozer revisions is beyond my understanding. At that time the only real solution to upgrade from a K10 family cpu was an Intel CPU.

Because of a paper written in the 2000s that suggested you could vastly improve integer performance with only a 10-15% increase in transistors by having more than one integer cluster per core. AMD tried it and it didn't go over so great because software couldn't really make heads or tails of the thing. Software was compiled for complete processors, not dual-thread--asymmetric processor designs. Bulldozer could have been great if software was compiled to take advantage of it. ...but that doesn't really matter because AMD still lied about how many "cores" their Bulldozer products had.

 

[seronx]

When "Bulldozer" was released how many PC CPUs (sold as new) had less FPU cores count compared to integer cores?

Bulldozer's FPU is in fact two FPUs in one. It is shared between the cores because that was a key advantage of a monolithic dual-core over a glued dual-core.

 

[FordGT90Concept]

Do a 256-bit FMAC operation and the thread on the other integer cluster is stalled until it completes. Impossible on a dual-core processor.

 

[seronx]

Do a 256-bit FMAC operation and the thread on the other integer cluster is stalled until it completes. Impossible on a dual-core processor.

None of the general purposes cores get stalled from anything on the FPU core. They are distinct from the FPU.