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AMD Gets Design Win in Cray Shasta Supercomputer for US Navy DSRC With 290,304 EPYC Cores

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Interesting that it's not using AMD's Arcturus accelerator, also that they didn't choose to use Milan. I wouldn't have thought a CPU will actually be installed for at least 9 months and Milan should be easily out by then.
They are going with what is available now and working nicely.
 
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The thing with the 56 core Xeon is though that they do not come anywhere close to the AMD chips in terms of efficiency. Besides Intel's probably making these parts only for demonstration because I see no price listed & of course the yields would be horrific, even after accounting for the fact that they're 2 Xeon platinums glued together.
On a chip vs chip basis efficiency might be in Intels favor, but not in this instance. I'd say the side that uses 621 less CPU chips is more efficient over all.

Be careful throwing that glue comment around, your Fanboism is showing. :p :rolleyes:
 

Cheeseball

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if nvidia is one step ahead with hardware with software nvidia is 10 step ahead of AMD. and it seems in professional world the big player are moving away from openCL and try to push their own version of "open standard". apple with metal. intel with one API.

Technically those are all open. You can use any GPGPU with the Metal, oneAPI, ROCm, CUDA (Radeons work through transpiling) and pure OpenCL frameworks.
 
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if nvidia is one step ahead with hardware with software nvidia is 10 step ahead of AMD. and it seems in professional world the big player are moving away from openCL and try to push their own version of "open standard". apple with metal. intel with one API.
10 steps ahead? I wouldn't say so. Besides Intel was ahead too and look now. There is nothing certain and I wouldn't be so sure if I were You.
 

INSTG8R

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Vikutorusama

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12.8 Peta FLOPS Is not much compared with the Atlas 900 from Huawei with 256 to 1024 Peta FLOPS
 
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