Jim Keller Resigns from Intel

[Jermelescu]

He's tremendous engineer. But I feel he is overrated and getting status of what I call Celebrity Engineer. I believe there are many engineers out there much better than him but don't get luxury of recognition and fame he's getting.

Sure, there may be someone better than him, but if you'd listen to him in his interviews, he's an extremely down to Earth guy.

 

[Assimilator]

Given the past trends, does this mean Intel will have an amazing chip in a couple of years time? He does have a history of leaving just before the launch of amazing chips.

Intel's problems are process node, not uArch. Skylake still has higher IPC than any iteration of Zen, if Intel hadn't stumbled so badly with 10nm there is little chance AMD would be having the success it is.

 

[Imsochobo]

Intel's problems are process node, not uArch. Skylake still has higher IPC than any iteration of Zen, if Intel hadn't stumbled so badly with 10nm there is little chance AMD would be having the success it is.

ehm, skylake has lower ipc than zen2.. I don't think you know what ipc means ?

 

[Assimilator]

ehm, skylake has lower ipc than zen2.. I don't think you know what ipc means ?

Yes, I do.

 

[Imouto]

Yes, I do.

Do you understand how flawed basing your conclusions on a single test by a single person is? That blog post is full to the brim with comments concerned about the methodology.

 

[londiste]

Yes, I do.

That is probably too academic and specific look at this. I bet this has to do with the nature of the code and Zen's separated execution paths vs Skylake's combined ones.

While IPC as it is used these days is technically a misnomer and it would be more correct calling it cock-normalized performance per core or something, the understanding of what it represents is pretty universally considered the same. And Zen2 does more work per clock cycle than Skylake at this point.

Edit:
clock-normalized, obviously

 

[SL2]

cock-normalized performance

I wasn't aware of that term..

 

[Vayra86]

Wouldn't be a consultant for the next six months if that was the case.

Good observation. I think reasons might very well be personal, as in, some motive beyond chip design itself.

 

[R0H1T]

Intel's problems are process node, not uArch. Skylake still has higher IPC than any iteration of Zen, if Intel hadn't stumbled so badly with 10nm there is little chance AMD would be having the success it is.

Well they have a giant infinitely (fabric) sized hole in their portfolio, without that AMD will always lead in the core count & likely in the overall performance metrics as well.

Nope, again zen2 has a higher IPC.

Yes & if AMD hadn't stumbled with their node shrinks (pre BD) Intel bribing OEMS & what not, Intel wouldn't be where they are today. Argument goes both ways doesn't it?

 

[londiste]

Well they have a giant infinitely (fabric) sized hole in their portfolio, without that AMD will always lead in the core count & likely in the overall performance metrics as well.

Intel has UPI. That'll do the trick easily enough and has, for years.

 

[R0H1T]

We've been over this ~ UPI isn't comparable to IF, not in its current implementation.

 

[londiste]

We've been over this ~ UPI isn't comparable to IF, not in its current implementation.

Implementation of which? If you want to hint at IF scaling better then it may be the case but current IF implementation is quite exactly comparable to UPI. And UPI can be scaled up as well (although possibly not that high). With all these interconnects you cannot realistically max it out in a real consumer or workstation product anyway - power and switching requirements are going to be difficult.

What is your reasoning for it not being comparable? Especially for connecting CPUs or their cores/components?

 

[R0H1T]

IF works inter die & intra die, from what remember UPI doesn't ~ in its current implementation they're not comparable. UPI also isn't flexible enough to the tune we've seen with IF, admittedly outside the one "hey look at me" 56c/112t launch I don't remember too many products prominently featuring UPI. If you've got better UPI success stories, by all means share them?

 

[londiste]

The primary reason Intel hasn't done much is that Intel has less UPI links in their dies than AMD. IIRC anything below XCC had 2 links and XCC has 3 while Zeppelin dies have 4.
Inter-die is largely irrelevant in this context.

 

[yeeeeman]

Two years is kind of short to turn out a new architecture or to even fix their silicon engineering failures. He could have finished his job there but I doubt it. At Tesla he helped build their industry leading neural processor, at AMD Zen architecture. At Intel... don't see much has changed?

A lot of strange comments from you.
First, what silicon engineering fails Jim could fix? He's an architect, not a silicon engineer.
Second, what you want to see changed at Intel the next day he left?
From AMD he left in 2015 and you see results in 2019.
So why are you expecting results in a day from Intel?

 

[thesmokingman]

A lot of strange comments from you.
First, what silicon engineering fails Jim could fix? He's an architect, not a silicon engineer.
Second, what you want to see changed at Intel the next day he left?
From AMD he left in 2015 and you see results in 2019.
So why are you expecting results in a day from Intel?

Jim was the head of Silicon Engineering.

Jim never took a leave for personal reasons at his previous successful posts. He left AMD and Tesla AFTER finishing his projects. The project success would be news and then later we found out that Jim left.

 

[yeeeeman]

I personally was boosting about Jim Keller here in the forums like a mad man quite a bit.... Now he's gone.....what a shame.... ☹

I noticed people haven't been talking about his project he was working on for the last 26 months....?

Jim Keller was working on In "Ocean Cove" cores design update for future Intel Meteor Lake which is Intel's first 7nm+ CPUs....

If people don't know Ocean Cove is Intel biggest CPU update coming in two years so very quite important project for Intel and for us consumers.

I wonder how far he's gotten in the Ocean Cove project?....are CPU lines done two years before store shelves?.... I mean they test them in super computers before factory production...not sure how long that process is.... But maybe Ocean Cove is done by this Christmas? I mean just the design part??

No, Ocean Cove is not taped out yet. It is in late design/verification stage. Currently Alder Lake (based on previous core named Golden Cove) is in tapeout stage and will reach market sometime next year.
Jim probably didn't have to do the job he usually does at AMD/Tesla, etc. He just came with more ideas for them to push IPC even more, because Intel already has a great team of architects that gave us Core, Nehalem, Sandy Bridge. I also believe Ocean Cove was already on the tables when he joined in 2018 simply because we need to understand the context.
If Intel didn't have fab issues, they should have had the following:
2016: Cannon Lake
2017: Ice Lake (launched in 2019)
2018: Tigerlake (willow cove)
2019: Alder Lake (Golden Cove)
2020: Meteor Lake (Ocean Cove)
You can imagine that in 2015 they didn't really expected massive issues with 10nm, so design teams were already working on Golden maybe even Ocean Cove cores.
We don't know what happened in the meantime, if they stopped the projects, if they paused them or if they just rethought the strategy and said, hey, since we're going to stagnate for a few years, lets do a clean sheet Core and come back with a bang. That is my opinion, that they chose the bang option and started work in 2017. By 2018 they saw Jim is free and they probably needed some extra ideas (getting the rumoured 80% higher IPC vs Skylake is a massive task) to get this new core designed. So my 2020, Ocean Cove should be already developed with design/verification in late stages. It will take one more year probably until tape out, so mid 2021 tapeout and release in mid 2022, if everything goes well.
Just read this: https://www.techpowerup.com/forums/...essor-significantly-bigger-jim-keller.259653/
Quote: "Keller describes Intel's next big CPU core as being "significantly bigger" than "Sunny Cove," with its 800-wide instruction window, and "massive" data- and branch-predictors, to put Intel back on a linear performance growth trajectory between generations. Keller also commented on this being a "mindset change" at Intel, which over the past decade, only delivered minor IPC increments between generations, and focused on other areas, such as efficiency"

 

[ToxicTaZ]

Wow...

Thank you for your post! Was fantastic....

I felt quite alone in here on the Cove topics...

I find it very strange others aren't fallowing Intel Cove projects... They quite important.

Ocean Cove is or was the most important project was tide to Meteor Lake which is Intel first 7nm+ CPUs launch that's now over 2 years behind......

I'm still hoping for Q4 2022 launch but most likely 2023

 

[MxPhenom 216]

Jim Keller seems to have a very "my job here is done" thing going on. I noticed that he never stick around once he's done his part in cpu design.

He goes through more companies than my girl goes through toilet paper.

 

[Vya Domus]

At Intel... don't see much has changed?

That's because it seems that decision at Intel are made with zero considerations to the engineering side of things, that's how we got a 250W 10 core CPU and that cursed 10nm node. I don't think people realize just what kind of fuck up 10nm was, I am 100% convinced the engineering guys made it clear it wasn't going to pan out well and they were likely ignored.

 

[ToxicTaZ]

That's because it seems that decision at Intel are made with zero considerations to the engineering side of things, that's how we got a 250W 10 core CPU and that cursed 10nm node. I don't think people realize just what kind of fuck up 10nm was, I am 100% convinced the engineering guys made it clear it wasn't going to pan out well and they were likely ignored.

Intel 10nm++ is out next year Q4 2021 12th gen (Alder Lake) Golden Cove on 16 cores big.Little Architecture on H6 LGA 1700 socket. All about energy efficiency and IPC

Before that....we have 11th gen (Rocket Lake) Willow Cove on H5 LGA 1200 socket. 8 cores and Just a little IPC update.

Willow Cove is replacing SkyLake Q1 2021boom...finally the first desktop Cove update.

So much in the works starting 2021 with two series in the same year....

Bad time to buy 10th generation knowing what's coming.

Jim Keller was with Ocean Cove project even more advanced 13th generation 7nm+ (Meteor Lake)

Crazy extreme performance coming...thanks to Jim Keller

 

[Lindatje]

AMD has higher IPC at the moment, that are the facts case closed.

 

[ToxicTaZ]

AMD has higher IPC at the moment, that are the facts case closed.

Very true...Zen2 is awesome! It's about time AMD brings the fight to Intel...these are exciting times for all of us consumers... Enjoy the two years before Intel turn to actually play with their real 7nm+ (new Fab42 factory)

Competition is healthy....and guys like Jim Keller play on both sides is pretty amazing.

I wonder if Jim Keller would ever go with Nvidia? would be interesting...

 

[lemonadesoda]

The question is, did he join Intel do achieve/develop something new at Intel, with a bid budget R&D, and so where is it? Or did Intel buy him in, with a contractual minimum term and non compete, to strategically block him from developing more good stuff for AMD?

 

[medi01]

Intel's problems are process node, not uArch.

Meltdown and his brothers say hi.