Raevenlord
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SMIC is taking immense strides in bridging the gap between China's in-house silicon manufacturing capability compared to the usual Taiwanese or US-based options. Despite its ties to the Chinese government, which led for a US blacklisting of the company amidst the current China-US trade-war, SMIC has definitely achieved a benchmark with its 7 nm tape-out. This was achieved after a number of funding rounds, some of them with the power of the Chinese state behind them. While the blacklisting definitely hurt the company, they still have access to ASML's semiconductor manufacturing equipment, so while the rope may be tight, it likely isn't suffocating.
The node's first production tape-out is for an ASIC (Application-Specific Integrated Circuit) design for Innosilicon, which specializes in cryptocurrency mining, purpose-built chips. SMIC states that the new N+1 process can offer up to 20% boosted performance at the same clocks and core complexity compared to their 12 nm designs, which is subpar compared to other player's "7 nm class nodes", such as GloFo's 12 LP+, Samsung's 8LPP and TSMC's N7 non-EUV nodes (TSMC, for instance, offered a 20% performance boost between the 10 nm and 7 nm nodes). SMIC's manufacturing looks better in other metrics, though: power requirements can be reduced by 57% at the same TDP and complexity, and the transistor density can be increased by up to 2.7 times, (the "up to" depends on specific semiconductor structures). This is SMIC is only targeting - for now - low-power and low-cost devices with the N+1 nodes.
View at TechPowerUp Main Site
The node's first production tape-out is for an ASIC (Application-Specific Integrated Circuit) design for Innosilicon, which specializes in cryptocurrency mining, purpose-built chips. SMIC states that the new N+1 process can offer up to 20% boosted performance at the same clocks and core complexity compared to their 12 nm designs, which is subpar compared to other player's "7 nm class nodes", such as GloFo's 12 LP+, Samsung's 8LPP and TSMC's N7 non-EUV nodes (TSMC, for instance, offered a 20% performance boost between the 10 nm and 7 nm nodes). SMIC's manufacturing looks better in other metrics, though: power requirements can be reduced by 57% at the same TDP and complexity, and the transistor density can be increased by up to 2.7 times, (the "up to" depends on specific semiconductor structures). This is SMIC is only targeting - for now - low-power and low-cost devices with the N+1 nodes.
View at TechPowerUp Main Site
