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Susquehanna is a global trading firm which has various interests in silicon manufacturing - and part of that interest is naturally materialized in Intel. In a recent group call from the firm, some details on Intel's manufacturing and product design woes came to light, which point towards even more execution slips than we've already seen. During the call, a number of points were broached, including dismal yields for Intel's 10 nm manufacturing process as of its introduction in late 2018 (which is why it never saw mainstream adoption from the company). News that Intel is looking for a new CEO also don't instill confidence on current CEO Bob Swan's capacity to steer the Intel behemoth.
Improved yields on 10 nm are being reported due to deployment of Intel's SuperFin technology, which improved yields to upwards of 50%, but still keeps them under the ones achieved in Intel's 14 nm process; an eye-opening tidbit in that Cannon Lake on 10 nm originally saw yields of only 25% usable chips per wafer; and that backporting Rocket Lake meant Intel had to deal with unfathomably large chips and high power consumption characteristics. And to add insult to injury, there is still not a definite timetable for 7 nm deployment, with delays being expected to be worse than the previously reported 6-12 months. This all paints a somewhat grim picture for Intel's capacity to compete with TSMC-powered AMD in many of its most important markets; the blue giant won't topple, of course, but it's expected that five years from now, we'll be looking at a very different outlook in the market between AMD and Intel. You can check the talked-about points in the call via the transcript after the break. You should still take the transcript with a grain of salt.
View at TechPowerUp Main Site
Improved yields on 10 nm are being reported due to deployment of Intel's SuperFin technology, which improved yields to upwards of 50%, but still keeps them under the ones achieved in Intel's 14 nm process; an eye-opening tidbit in that Cannon Lake on 10 nm originally saw yields of only 25% usable chips per wafer; and that backporting Rocket Lake meant Intel had to deal with unfathomably large chips and high power consumption characteristics. And to add insult to injury, there is still not a definite timetable for 7 nm deployment, with delays being expected to be worse than the previously reported 6-12 months. This all paints a somewhat grim picture for Intel's capacity to compete with TSMC-powered AMD in many of its most important markets; the blue giant won't topple, of course, but it's expected that five years from now, we'll be looking at a very different outlook in the market between AMD and Intel. You can check the talked-about points in the call via the transcript after the break. You should still take the transcript with a grain of salt.
View at TechPowerUp Main Site
