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The possibility barely exists to account for all the silicon manufacturing processes currently in development; TSMC themselves are rolling out 5 nm, 4 nm, 3 nm, and 2 nm processes at various points in time in the future. Now, the company has announced that it will be rolling out a revision of the 3 nm manufacturing process, named 3 nm Plus, come 2023. According to DigiTimes, the Taiwanese manufacturer's first client for this process will be Apple.
There is no information on what exactly 3 nm Plus leverages and offers over the "vanilla" 3 nm process. It could be anything from higher transistor density, lower power consumption, or higher operating frequency - or maybe a mixture of the three. The original 3 nm manufacturing process is set to offer a 15% performance gain over the current top-of-the-line 5 nm node, with 30% decreased power use and up to 70% density increase. Interestingly, TSMC is keeping their FinFet manufacturing technology, on grounds of better implementation costs and higher power efficiency compared to the more exotic GAA (Gate-All-Around) technology that its rival Samsung, for one, aims to implement in 3 nm.
View at TechPowerUp Main Site
There is no information on what exactly 3 nm Plus leverages and offers over the "vanilla" 3 nm process. It could be anything from higher transistor density, lower power consumption, or higher operating frequency - or maybe a mixture of the three. The original 3 nm manufacturing process is set to offer a 15% performance gain over the current top-of-the-line 5 nm node, with 30% decreased power use and up to 70% density increase. Interestingly, TSMC is keeping their FinFet manufacturing technology, on grounds of better implementation costs and higher power efficiency compared to the more exotic GAA (Gate-All-Around) technology that its rival Samsung, for one, aims to implement in 3 nm.
View at TechPowerUp Main Site