It certainly makes more sense to me to increase the core count within the CCD rather than add more chiplets from a performance, latency, etc standpoint. But maybe it is really hard to do I don't know.
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AMD "Genoa" Expected to Cram Up to 96 Cores, MCM Imagined
- Thread starter btarunr
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Depends on the link from io-die to chiplet. If you make chiplets fatter, needs wider/faster link(s) to io-die and that will effect yields. Easier to scale ram channels and chiplet count and keep performance from bottlenecking.
The whole idea of chiplets is to not put too many apples in one basket. Desktop wise, from a latency perspective it would be nice to have 12-16c ccd's sure...
But DDR5 (higher frequency lower latency IF) will help that as well.