The presentation I linked shows very clearly that the chipset hosts ME.Actually, that is possible admitedly because the Minux binaries are single threaded. But they also are x64, and I guess the core contention I have is that I find it unlikely they could stuff that in the chipset without a thermal envelope that is unacceptably large. Maybe atom is way better than the old day, I am not really as up to date on architectures as I once was.
Also, spectre style exploits work on protected enclaves, suggesting what is running them indeed is an out of order cpu, at least. Are atoms out of order? I thought they weren't.
I guess I'll back off a little and admit this: anything is possible but I don't find it likely.
My only guess is if they are lying, they don't see it as lying. The firmware itself lives in the bios chip which connects directly to the PCH. Maybe they consider that when they say the ME "lives" there. But it's just speculation.
The x64 parts of the Minix firmware could be explained by slide 9 which shows that during bring-up, more specifically DRAM init, there is a part of ME running on the host CPU called ACM. But even after the host OS is started, ME services keep living on the embedded i486.
Security enclaves, as in SGX? That indeed does live in the CPU, as in the code runs there (the SDK and public info confirms this), but is managed by ME from the chipset. I am not aware of any speculative execution exploit that managed to break into the ME part. If you are I'd appreciate some links or even keywords.
Edit: the entire presentation is very technical, I'll have to watch the recording of it later on, but I'm surprised Intel shared this much publicly.