TheLostSwede
News Editor
- Joined
- Nov 11, 2004
- Messages
- 17,788 (2.42/day)
- Location
- Sweden
| System Name | Overlord Mk MLI |
|---|---|
| Processor | AMD Ryzen 7 7800X3D |
| Motherboard | Gigabyte X670E Aorus Master |
| Cooling | Noctua NH-D15 SE with offsets |
| Memory | 32GB Team T-Create Expert DDR5 6000 MHz @ CL30-34-34-68 |
| Video Card(s) | Gainward GeForce RTX 4080 Phantom GS |
| Storage | 1TB Solidigm P44 Pro, 2 TB Corsair MP600 Pro, 2TB Kingston KC3000 |
| Display(s) | Acer XV272K LVbmiipruzx 4K@160Hz |
| Case | Fractal Design Torrent Compact |
| Audio Device(s) | Corsair Virtuoso SE |
| Power Supply | be quiet! Pure Power 12 M 850 W |
| Mouse | Logitech G502 Lightspeed |
| Keyboard | Corsair K70 Max |
| Software | Windows 10 Pro |
| Benchmark Scores | https://valid.x86.fr/yfsd9w |
Back in June of 2019, the PCI-SIG announced that work had started on PCIe 6.0 and some two years and four months later, PCIe 6.0 has reached version 0.9, which equals draft spec. What this means is that companies can now start to implement PCIe 6.0 into their products, to make sure they're compliant with the draft spec, since no additional functional changes will be made, unless something major is discovered.
PCIe 6.0 will be the first PCIe standard to use PAM-4 encoding, something it shares with GDDR6 memory among other standards. What this means is that twice the data can be sent per clock cycle for 64GT/s, or twice that of PCIe 5.0. Another key feature is FEC or low-latency forward error correction, as this was implemented to maintain data integrity. PCIe 6.0 is expected to be backwards compatible with all previous versions of PCIe. The final PCIe 6.0 spec isn't likely to be finalised until early next year, based on previous standards, although the original plan was to finish ratifying the spec this year.
View at TechPowerUp Main Site
PCIe 6.0 will be the first PCIe standard to use PAM-4 encoding, something it shares with GDDR6 memory among other standards. What this means is that twice the data can be sent per clock cycle for 64GT/s, or twice that of PCIe 5.0. Another key feature is FEC or low-latency forward error correction, as this was implemented to maintain data integrity. PCIe 6.0 is expected to be backwards compatible with all previous versions of PCIe. The final PCIe 6.0 spec isn't likely to be finalised until early next year, based on previous standards, although the original plan was to finish ratifying the spec this year.
View at TechPowerUp Main Site
