Intel "Raptor Lake" Rumored to Feature Massive Cache Size Increases

[btarunr]

Large on-die caches are expected to be a major contributor to IPC and gaming performance. The upcoming AMD Ryzen 7 5800X3D processor triples its on-die last-level cache using the 3D Vertical Cache technology, to level up to Intel's "Alder Lake-S" processors in gaming, while using the existing "Zen 3" IP. Intel realizes this, and is planning a massive increase in on-die cache sizes, although spread across the cache hierarchy. The next-generation "Raptor Lake-S" desktop processor the company plans to launch in the second half of 2022 is rumored to feature 68 MB of "total cache" (that's AMD lingo for L2 + L3 caches), according to a highly plausible theory by PC enthusiast OneRaichu on Twitter, and illustrated by Olrak29_.

The "Raptor Lake-S" silicon is expected to feature eight "Raptor Cove" P-cores, and four "Gracemont" E-core clusters (each cluster amounts to four cores). The "Raptor Cove" core is expected to feature 2 MB of dedicated L2 cache, an increase over the 1.25 MB L2 cache per "Golden Cove" P-core of "Alder Lake-S." In a "Gracemont" E-core cluster, four CPU cores share an L2 cache. Intel is looking to double this E-core cluster L2 cache size from 2 MB per cluster on "Alder Lake," to 4 MB per cluster. The shared L3 cache increases from 30 MB on "Alder Lake-S" (C0 silicon), to 36 MB on "Raptor Lake-S." The L2 + L3 caches hence add up to 68 MB. All eyes are now on "Zen 4," and whether AMD gives the L2 caches an increase from the 512 KB per-core size that it's consistently maintained since the first "Zen."



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[lexluthermiester]

This could be a good thing if done right and utilized properly.

 

[ncrs]

This could be a good thing if done right and utilized properly.

More cache usually means worse latency, but we'll have to see.

Anyway, Intel PR department should've pressed for 69MB total...

Edit: since the sum only counts L2 and L3, and Alder Lake has 1408KB of total L1 cache in 8P+8E config, it might be "rounded" to 69MB

 

[Daven]

If Zen 4 doubles the L2 and provides 3d cache on two chiplets, wouldn’t that be 208 MB “ total cache” (16 MB L2 + 32 MB L3 + 32 MB L3 + 64 MB 3D + 64 MB 3D)?

 

[zlobby]

More cache usually means worse latency, but we'll have to see.

Anyway, Intel PR department should've pressed for 69MB total...

Edit: since the sum only counts L2 and L3, and Alder Lake has 1408KB of total L1 cache in 8P+8E config, it might be "rounded" to 69MB

And it should be announced on 4/20, right?

 

[ncrs]

And it should be announced on 4/20, right?

Great idea! The top model could be called Core i9-13337K.

 

[lexluthermiester]

More cache usually means worse latency

Not always and where CPU cache is concerned, not by much. At least not enough to be a serious problem for overall performance of the subject CPU.

Anyway, Intel PR department should've pressed for 69MB total...

it might be "rounded" to 69MB

And it should be announced on 4/20, right?

Great idea! The top model could be called Core i9-13337K.

Can we be done with the childish off-topic nonsense?

 

[kapone32]

Let's see what the 5800X3D is like and then we can make extrapolations on those numbers. It is also depends on where on the Die the extra cache is placed.

 

[ncrs]

Not always and where CPU cache is concerned, not by much. At least not enough to be a serious problem for overall performance of the subject CPU.

Alder Lake has already increased cache latency in comparison to Rocket Lake. If they go even further we might arrive in a situation where Zen 3 will have almost half the cache latency of Raptor Lake. But in the end we'll have to wait for benchmarks, and even then it is going to be workload-dependent.

Can we be done with the childish off-topic nonsense?

There's nothing wrong with having some fun.

Let's see what the 5800X3D is like and then we can make extrapolations on those numbers. It is also depends on where on the Die the extra cache is placed.

It's supposed to go over the existing cache to prevent thermal issues of the cores.

 

[kapone32]

Alder Lake has already increased cache latency in comparison to Rocket Lake. If they go even further we might arrive in a situation where Zen 3 will have almost half the cache latency of Raptor Lake. But in the end we'll have to wait for benchmarks, and even then it is going to be workload-dependent.



There's nothing wrong with having some fun.


It's supposed to go over the existing cache to prevent thermal issues of the cores.

Well if Intel can achieve that and keep the Power draw inline I will be impressed.

 

[efikkan]

This article title is more than a little disingenuous, when the L3 cache increases from 30 MB to 36 MB, a whopping 6 MB more for the whole CPU, coming from adding more cores to the CPU.
Adding up the total L2 cache is just PR nonsense.

 

[Wirko]

That's one loooong ring bus in the middle. 12 stations + IGP + I/O?

 

[bug]

I think I've said this before, but caches today are bigger than my first HDD (42MB).

 

[Wirko]

Adding up the total L2 cache is just PR nonsense.

If you need to give just one number, 68 MB makes more sense than 36 MB.

 

[Steevo]

Not always and where CPU cache is concerned, not by much. At least not enough to be a serious problem for overall performance of the subject CPU.





Can we be done with the childish off-topic nonsense?

Nah brah

Not while both companies have shills harping about how cache isn’t the new IPC increase they have dreamed about.

Cache is the new IPC tool, the benefit to consumers overall is cache power management rolling off to system ram, Vmem, and allowing for better utilization of power for a given performance product.

Intel should release the 1337K double 69 cache CPU with 6.9Ghz single core with no AVX or Blu-ray decoding or GPU for maximum power to the cores.

 

[Minus Infinity]

More cache usually means worse latency, but we'll have to see.

Anyway, Intel PR department should've pressed for 69MB total...

Edit: since the sum only counts L2 and L3, and Alder Lake has 1408KB of total L1 cache in 8P+8E config, it might be "rounded" to 69MB

Already testing on Epyc Milan X has shown cache increase is really small with 3D cache, only 3-4 cycles.

And Zen 4 is doubling L2 cache as well as whatever they might do with L3 cache.

 

[DeathtoGnomes]

This article title is more than a little disingenuous, when the L3 cache increases from 30 MB to 36 MB, a whopping 6 MB more for the whole CPU, coming from adding more cores to the CPU.
Adding up the total L2 cache is just PR nonsense.

I agree here, however, massive is a unit of measure in E-peen battles.

The time table for Raptor pond is a good deal away, so this PR 'leak' matters much yet.

 

[zlobby]

Can we be done with the childish off-topic nonsense?

Carpe diem! Or have a Snickers.

I think I've said this before, but caches today are bigger than my first HDD (42MB).

You had a HDD? Lucky!

 

[bug]

You had a HDD? Lucky!

I said "my first HDD", not "my first computer"
Fwiw, that would be a ZX Spectrum clone, didn't even a FDD drive.

 

[zlobby]

Great idea! The top model could be called Core i9-13337K.

And it shall has Coors. And THC instead of TDP. Flower power!

I said "my first HDD", not "my first computer"
Fwiw, that would be ZX Spectrum clone, didn't even a FDD drive.

And I though I had it bad with tape and floppies.

 

[bug]

Amd I though I had it bad with tape and floppies.

That it did (the infamous "R - Tape loading error"). Still, I loved that thing. To this day i think it's a way better machine to start with than modern PCs/laptops. Power it on, seconds later you are greeted with an interpreter. You want to do something with it, you're pretty much forced to write your first computer command. Modern machines? You can spend months on them without learning how to tell them to add 1 and 1. You have a better chance of asking Google for the result first.

 

[zlobby]

That it did (the infamous "R - Tape loading error"). Still, I loved that thing. To this day i think it's a way better machine to start with than modern PCs/laptops. Power it on, seconds later you are greeted with an interpreter. You want to do something with it, you're pretty much forced to write your first computer command. Modern machines? You can spend months on them without learning how to tell them to add 1 and 1. You have a better chance of asking Google for the result first.

Those machines built real coders and programmers.

Coders nowadays - Helmp! Javascript throws NaN whem I add 1 and 1...

 

[Wirko]

Windows XP requires 64 MB of memory, I guess this includes cache.

 

[zlobby]

Windows XP requires 64 MB of memory, I guess this includes cache.

If we don't go extinct as a species, HDD and RAM will be the same, i.e. NVRAM. Lots of the processing will be done there and not in the CPU as it is now. Exciting times, eh?

 

[Deleted member 24505]

There's a lot of shit posting in this news thread. I guess it's because it's an Intel one.

Back on topic time maybe.