MSI Partially Reenables AVX-512 Support for Alder Lake-S Processors

[AleksandarK]

Intel's Alder Lake processors have two types of cores present, with two distinct sets of features and capabilities enabled. For example, smaller E-cores don't support the execution of AVX-512 instructions, while the bigger P-cores have support for AVX-512 instructions. So Intel has decided to remove support for it altogether not to create software errors and run into issues with executing AVX-512 code on Alder Lake processors. This happened just months before the launch of Alder Lake, making us see some initial motherboard BIOSes come with AVX-512 enabled from the box. Later on, all motherboard makers pulled the plug on it, and it is a rare sight to see support for it.

However, it seems like MSI is unhappy with the lack of AVX-512, and the company is reenabling partial support for it. According to Xaver Amberger, editor at Igor's Lab, MSI reintroduces selecting microcode version with its MEG Z690 Unify-X motherboard. There is an option for AVX-512 enablement in the menu, and it is indeed a functional one. With BIOS A22, MSI enabled AVX-512 instruction execution, and there are benchmarks to prove it works. This shows an advantage of 512-bit wide execution units of AVX-512 over something like AVX2, which offers only 256-bit wide execution units. In applications such as Y-Cruncher, AVX-512 enabled the CPU to reach higher performance targets while consuming less power.


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[Chaitanya]

While its a good addition doesnt really matter for my workloads.

 

[bug]

Interesting choice of words: "reenables". Considering MSI is the maker that didn't offer the option to enable AVX512 initially.

What can I say, it's not really helpful on the desktop, but in the odd case you need AVX512, if Intel already wasted the die area on it, why not have the option avaialble?

 

[ncrs]

If this really works by selecting microcode version then it's a potential security risk. Since Intel disabled AVX-512 in microcode if in the future there's a microcode security update it will also have it disabled. Using this feature will lower CPU security for the sake of enabling AVX-512. It's something that potential users should be aware of.

 

[Prima.Vera]

Does any game engines use those instructions set?

 

[TheinsanegamerN]

Does any game engines use those instructions set?

No, as AVX 512 on consumer desktops is only supported by rocket lake (which sold like junk) and alder lake (where it is officially disabled). On mobile it was on cascade lake (which had a grand total of 1 CPU design), as well as ice and tiger lake, although feature support is a mess compared to rocket lake/alder lake.

It's been on intel server chips for the last 5 years but hasnt seen widespread acceptance, in part due to feature support being a mess compared to AVX/AVX2.

It would be nice to see more widespread use, when sins of a solar empire rebellion received AVX support in 2019 it made a huge difference in performance in late game.

 

[RedBear]

Does any game engines use those instructions set?

No game engine, but there's an open source PS3 emulator (RPCS3) that uses those instructions. Honestly I'm really disappointed with Intel being Intel again, restricting the usage of your new instruction isn't really the way to go if you want to see more widespread adoption, I'm hoping they will wise up when Zen 4 will finally bring AVX 512 instructions on the AMD side...

 

[TheinsanegamerN]

No game engine, but there's an open source PS3 emulator (RPCS3) that uses those instructions. Honestly I'm really disappointed with Intel being Intel again, restricting the usage of your new instruction isn't really the way to go if you want to see more widespread adoption, I'm hoping they will wise up when Zen 4 will finally bring AVX 512 instructions on the AMD side...

I mean intel didnt advertise AVX 512 as a feature on alder lake. It's likely there is either something wrong with its implementation on alder lake or intel is worried about potential incompatibility when people disable the E cores.

Seems to me intel would have been better off making a 10 P core i9, but then they couldnt brag about having more threads then AMD or something like that.

 

[RedBear]

I mean intel didnt advertise AVX 512 as a feature on alder lake. It's likely there is either something wrong with its implementation on alder lake or intel is worried about potential incompatibility when people disable the E cores.

Seems to me intel would have been better off making a 10 P core i9, but then they couldnt brag about having more threads then AMD or something like that.

There's no reason to think that there's something wrong with Alder Lake's implementation and disabling the E cores was very much one solution to circumvent the issues with Denuvo's DRM, you lose performance in some workloads, but it should be up to to user how he/she should use his/her CPU (without even mentioning that Intel literally made a die, H0, without any E cores that is used for the lower end parts). Honestly there's no way around it, they're trying to force the few users who actually need AVX 512 instructions to buy the ever delayed Sapphire Rapids, rather than getting high end Alder Lake parts that might fit their needs. But while they keep trying segmenting their offer AMD keeps advancing, I genuinely think that Intel is shooting itself on the feet, unfortunately.

 

[Scrizz]

No, as AVX 512 on consumer desktops is only supported by rocket lake (which sold like junk) and alder lake (where it is officially disabled). On mobile it was on cascade lake (which had a grand total of 1 CPU design), as well as ice and tiger lake, although feature support is a mess compared to rocket lake/alder lake.

It's been on intel server chips for the last 5 years but hasnt seen widespread acceptance, in part due to feature support being a mess compared to AVX/AVX2.

It would be nice to see more widespread use, when sins of a solar empire rebellion received AVX support in 2019 it made a huge difference in performance in late game.

Cascade Lake wasn't mobile.

 

[efikkan]

I mean intel didnt advertise AVX 512 as a feature on alder lake. It's likely there is either something wrong with its implementation on alder lake or intel is worried about potential incompatibility when people disable the E cores.

AVX-512 works fine on Alder Lake with E-cores disabled.
The issue is when you have E-cores enabled, and what happens when a program tries to execute an incompatible instruction on the E-core. I know some have claimed they tried to implement a mechanism to stall the thread and move it to a P-core. If this is true, then the mechanism probably didn't work reliably. I can't believe they didn't realize having different ISA support on cores would result in problems requiring a hardware solution. Either way, it's an embarrassing screw-up from their side.

The proper solution would be to implement AVX-512 on the E-cores too. And contrary to what people would believe, it doesn't have to be very costly. Because the purpose of this implementation would be to prevent stability issues, so it wouldn't have to be a fast implementation. They basically could split up most operations, and just a few would need extra logic.