Intel "Meteor Lake" and "Arrow Lake" Use GPU Chiplets

[Nephilim666]

At what point does the cost and yeild benefit disappear with all this complex alignment and 'gluing' of chipsets tiles?

 

[Ruru]

EDIT: Apparently the old Core 2 Quads had multiple dies.

Picture from @Ruslan

I knew that the older Pentium D chips also had multiple dies.

Both dies were processor dies. This was back in the days of having the northbridge on the motherboard.

Yeah the Pentium D 900 series had multiple dies, D 800 had one big die (put basicly a dual Pentium 4 500 series)

 

[Wirko]

So Intel had the great idea of chiplets/tiles as early as clarkdale in 2010, did they go back to a single die after this? If so I wonder why. As long as the interconnect between them is fast enough it's a great setup as seen by Ryzen.

What is the interface between the tiles on these?

At what point does the cost and yeild benefit disappear with all this complex alignment and 'gluing' of chipsets tiles?

It's not some fixed point. Chip manufacturing is advancing, albeit slowly, price per transistor is heading upwards instead of downwards, and there's a size limit of 26x33 mm. Meanwhile, packaging tech is advancing at an amazing rate - see Intel, TSMC, Cerebras - but in my opinion, exotic tech comes at an exotic price. So it's all dictated by economics... like ever before.

Edit: Hey, can anyone identify this price-no-object processor called Itanium? It has four dies on a single substrate. They can't be anything else but cache - it's from a period when cache was separate from the CPU, like in Pentium II and III. Source: https://chipscapes.com/products/intel-generations
View attachment Gen2_B_1024x1024.webp

 

[thestryker6]

...

Edit: Hey, can anyone identify this price-no-object processor called Itanium? It has four dies on a single substrate. They can't be anything else but cache - it's from a period when cache was separate from the CPU, like in Pentium II and III. Source: https://chipscapes.com/products/intel-generations
View attachment 237317

That would be either an Itanium 733 or 800 with 4 MB L3 cache. I believe the first generation were the only ones to feature the separated cache.

I've often wondered what the landscape would look like if Intel had been able to shift to IA-64 and leave x86 behind. AMD was smart to design the extension to x86 with AMD64, because of the state of the software market, but a clean break could have changed everything.

 

[Wirko]

That would be either an Itanium 733 or 800 with 4 MB L3 cache. I believe the first generation were the only ones to feature the separated cache.

You're right. So Intel (and HP) did glue several chips on a common substrate as early as 2001. IBM and others did it before (early examples I found on a Russian site). Maybe IBM had EMIB but didn't tell anyone, and those who cut IBM modules apart didn't notice anything because it was too advanced.

I've often wondered what the landscape would look like if Intel had been able to shift to IA-64 and leave x86 behind. AMD was smart to design the extension to x86 with AMD64, because of the state of the software market, but a clean break could have changed everything.

In 2026, thanks to Itanium E-cores, notebooks would finally become as thin as they used to be in 2000.

 

[thestryker6]

You're right. So Intel (and HP) did glue several chips on a common substrate as early as 2001. IBM and others did it before (early examples I found on a Russian site). Maybe IBM had EMIB but didn't tell anyone, and those who cut IBM modules apart didn't notice anything because it was too advanced.

During that era everything would have been connected by a bus (most likely dedicated between cache and core) as the process node technology wasn't good enough to even imagine something like EMIB.

In 2026, thanks to Itanium E-cores, notebooks would finally become as thin as they used to be in 2000.

You're not wrong with how terribly they started out.

 

[Cutechri]

My 90nm identifies as 1nm and failure to respect that is hate crime.

Ugh.

 

[MikeMurphy]

I can't believe they're spinning this as new , I mean a reasonably useful GPU in an Intel CPU would be new, but Intel doing an McM with a CPU and GPU is so last decade.

And a few weeks ago they were buying their competitors GPU to place on their McM.(sarcasm )

In fact the only new bit is Intel has decided to nick AMD'S McM IO die concept, no?!.

Integrated performance demands are much higher now than in 2010, and with big appetites for many cores it makes sense to move the the large GPU die off of the CPU die.

 

[TheoneandonlyMrK]

Integrated performance demands are much higher now than in 2010, and with big appetites for many cores it makes sense to move the the large GPU die off of the CPU die.

I wasn't against it ?

Just it's as new as my bad knee.

 

[Richards]

This is like alien technology from intel

 

[Wirko]

Integrated performance demands are much higher now than in 2010, and with big appetites for many cores it makes sense to move the the large GPU die off of the CPU die.

With MCM, Intel can also fracture the supply chain in ways unimaginable in 2010, and have parts of a single product partly made in India, Germany, China, Ireland, Mexico, Italy, Japan, Malaysia, US, South Korea, Israel, Taiwan and Jamaica. It's cheaper this way.

 

[TheoneandonlyMrK]

This is like alien technology from intel

Say what now?!.

Which time around ,this time or last time?!