• Welcome to TechPowerUp Forums, Guest! Please check out our forum guidelines for info related to our community.

Intel Taps MIPS eVocore for Intel Pathfinder for RISC-V

TheLostSwede

News Editor
Joined
Nov 11, 2004
Messages
17,771 (2.42/day)
Location
Sweden
System Name Overlord Mk MLI
Processor AMD Ryzen 7 7800X3D
Motherboard Gigabyte X670E Aorus Master
Cooling Noctua NH-D15 SE with offsets
Memory 32GB Team T-Create Expert DDR5 6000 MHz @ CL30-34-34-68
Video Card(s) Gainward GeForce RTX 4080 Phantom GS
Storage 1TB Solidigm P44 Pro, 2 TB Corsair MP600 Pro, 2TB Kingston KC3000
Display(s) Acer XV272K LVbmiipruzx 4K@160Hz
Case Fractal Design Torrent Compact
Audio Device(s) Corsair Virtuoso SE
Power Supply be quiet! Pure Power 12 M 850 W
Mouse Logitech G502 Lightspeed
Keyboard Corsair K70 Max
Software Windows 10 Pro
Benchmark Scores https://valid.x86.fr/yfsd9w
MIPS, a leading developer of highly scalable RISC processor IP, announced it is working with Intel to accelerate innovation in open computing. As part of this effort, MIPS' eVocore is being incorporated into the new Intel Pathfinder for RISC-V, a platform designed to deliver new capabilities for pre-silicon development. Intel Pathfinder allows new ways for System-on-a-Chip (SoC) architects and system software developers to define new products and pursue pre-silicon software development on RISC-V.

"MIPS is thrilled to be part of the Intel Pathfinder for RISC-V platform, providing high performance cores with support for multi-cluster, multi-core and multi-threading to accelerate innovation," said Desi Banatao, MIPS CEO. "These multiprocessors have unique features and a high level of scalability that make them ideal for compute-intensive tasks across a broad range of markets and applications."




The new eVocore P8700 and I8500 multiprocessor IP cores, which include best-in-class power efficiency for use in SoC applications, are the first MIPS products based on the RISC-V open instruction set architecture (ISA) standard.

The Intel Pathfinder FPGA development platform incorporates MIPS cores within a unified IDE, while supporting leading operating systems and industry-standard toolchains. Going forward, this will open up new opportunities for developers to quickly build prototypes for segments like Automotive which have additional Functional Safety (FuSa) requirements.

"This is a unique and important capability for startups because it can enable them to explore their solution and accelerate the rate at which they can find a product market fit," Banatao said.

As the adoption of RISC-V accelerates, many companies are taking advantage of the open architecture to create custom processors designed to handle the power and performance requirements of newer workloads for artificial intelligence, machine learning, and virtual/augmented reality, and more.

"With industry heavyweights like Intel taking a leadership role in advancing the adoption of RISC-V, we will see this open computing architecture being used to support a plethora of devices and products, from automotive to 5G and wireless networking, data center and storage, and high-performance embedded applications," said Ashok Balivada, COO of MIPS.

View at TechPowerUp Main Site | Source
 
Joined
Mar 21, 2016
Messages
2,508 (0.78/day)
Intel looking for new fields to fail

Open standard are good thing though and Intel can afford to fail in this if it doesn't work out too positively that isn't going to make or break them as a company diverse as it is. If anything they'd find some ways to repurpose and savage the technology itself in all probability.
 
Top