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IPC Comparisons Between Raptor Cove, Zen 4, and Golden Cove Spring Surprising Results

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OneRaichu, who has access to engineering samples of both the AMD "Raphael" Ryzen 7000-series, and Intel 13th Gen Core "Raptor Lake," performed IPC comparisons between the two, by disabling E-cores on the "Raptor Lake," fixing the clock speeds of both chips to 3.60 GHz, and testing them across a variety of DDR5 memory configurations. The IPC testing was done with SPEC, a mostly enterprise-relevant benchmark, but one that could prove useful in tracing where the moderately-clocked enterprise processors such as EPYC "Genoa" and Xeon Scalable "Sapphire Rapids" land in the performance charts. OneRaichu also threw in scores obtained from a 12th Gen Core "Alder Lake" processor for this reason, as its "Golden Cove" P-core powers "Sapphire Rapids" (albeit with more L2 cache).

With DDR5-4800 memory, and testing on SPECCPU2017 Rate 1, at 3.60 GHz, the AMD "Zen 4" core ends up with the highest scores in SPECint, topping even the "Raptor Cove" P-core. It scores 6.66, compared to 6.63 total of the "Raptor Cove," and 6.52 of the "Golden Cove." In the SPECfp tests, however, the "Zen 4" core falls beind "Raptor Cove." Here, scores a 9.99 total compared to 9.91 of the "Golden Cove," and 10.21 of the "Raptor Cove." Things get interesting at DDR5-6000, a frequency AMD considers its "sweetspot," The 13th Gen "Raptor Cove" P-core tops SPECint at 6.81, compared to 6.77 of the "Zen 4," and 6.71 of "Golden Cove." SPECfp sees the "Zen 4" fall behind even the "Golden Cove" at 10.04, compared to 10.20 of the "Golden Cove," and 10.46 of "Raptor Cove."



The big surprise here is just how good the "Gracemont" E-cores are in SPECint. OneRaichu made a distinction between the "Gracemont" E-cores of "Alder Lake" (GLC-12) and those of "Raptor Lake" (GLC-13,) as the latter have double the amount of shared L2 cache per E-core cluster. The E-core is fast approaching IPC levels comparable to that of "Skylake," which really is Intel's calculation in giving its processors a large number of E-cores next to a small number of P-cores. The idea is that the E-cores will soak up all the moderately-intensive compute workloads and background processes, keeping the P-cores free for gruelling compute-heavy tasks.

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IPC: neck to neck
Clock speed: neck to neck

The rest are

power consumption
compatibility
price
 
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Although interesting, but fixing clock speed at 3.6GHz is somewhat irrelevant to actual context. 3.6GHz is way too low for any realistic Rate-1 (Single core) scenarios. From 3.6GHz to 4.5+GHz, it is almost safe to say IPC degradation characteristic will play a major role. IPC degradation in this scenario would mainly come from memory level parallelism capability of the microarchitecture.

To actually compare IPC of two similiar CPUs, it is best to bring them as close to the highest common single core frequency as possible.
 
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IPC is a constant (and depends on task), and it is independent of core frequency (and why you multiple both together to approximate performance FYI).

The higher the core frequency, the higher it will be scewed by buses/IMC/DRAM performance, and higher chance of throttling based on cooling/power requirements (we do not know how power optimised are BIOS-es of platforms used tested benchmarks [or what versions he used]).
Lastly, this isn't meant to be realistic "Joe" benchmark, he is testing in science oriented applications after all.
 
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by disabling E-cores

 
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IPC: neck to neck
Clock speed: neck to neck

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and...preformance for a given task.
I think it also importent, dont you?

Also, avilabilty and the cost of the whole packge (DDR, MB, CPU)
 
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Interesting comparison indeed, looks like Raptor Cove is from ~0.5 to ~4.0% faster than Raphael, but testing the whole package if not the whole platform with associated costs shall paint the final picture and considering those 253W from preliminary reports again doesn't seem promising for intel.
 
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Its comfy to know IPC is so close between these cores.

That gives you a pretty good view on what to buy for what purpose, just get the core count and freq you need.
 
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Although interesting, but fixing clock speed at 3.6GHz is somewhat irrelevant to actual context. 3.6GHz is way too low for any realistic Rate-1 (Single core) scenarios. From 3.6GHz to 4.5+GHz, it is almost safe to say IPC degradation characteristic will play a major role. IPC degradation in this scenario would mainly come from memory level parallelism capability of the microarchitecture.

To actually compare IPC of two similiar CPUs, it is best to bring them as close to the highest common single core frequency as possible.
Like @agent_x007 notes IPC is a constant and is tested at a fixed frequency of around 3500-3600 MHz. OneRaichu compares IPC like Anandtech does, this means we can't ignore the results. Now the idea of testing at higher frequencies especially with today's CPUs boosting at 5+GHz is interesting, but I guess it needs some consensus.
 
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Those scores are pretty close if not within the margin of error. It's like splitting hairs here... I also think bios immaturity with RPL could be a handicap.
 
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IPC is a constant (and depends on task), and it is independent of core frequency (and why you multiple both together to approximate performance FYI).

The higher the core frequency, the higher it will be scewed by buses/IMC/DRAM performance, and higher chance of throttling based on cooling/power requirements (we do not know how power optimised are BIOS-es of platforms used tested benchmarks [or what versions he used]).
Lastly, this isn't meant to be realistic "Joe" benchmark, he is testing in science oriented applications after all.
IPC is not a constant. Or better to say it is a constant only in linear extrapolations. 3.6GHz extrapolated to 4.0GHz is good enough, but becomes difficult to swallow when extrapolated to 5.0GHz.

Being screwed by IMC/DRAM is part of the game because memory subsystem are part of the CPU design. And memory level parallelism hasn't even get that far to the IMC yet, because MLP is part of the microarchitecture's load/store subsystem. MLP is a microarchitecture feature to park cache-missed memory access aside. "How fast the cores are generating cache misses" vs "how fast memory is resolving them" is guaranteed to have an impact (Imaging the cores are generating them 40% faster than usual, and also becomes 40% more "impatient" for results while the resolution time does not change or even degrades). There are far more quirks than MLP in the microarchitecture that is frequency sensitive (the previous process also puts pressure on other out-of-order mechanisms). So IPC not only needs to be discussed in terms of program, memory, bus, caches, etc. It also needs to be discussed in terms of frequency. There was some IPC claims cheated using a few hundred MHz.

To illustate the point, zen family previously had significantly better MLP than intel.
 
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What will decide most sales of these CPUs will be power consumption and price, which is great because it means competition has made it so that Intel and AMD are pushing their arch to 100%.

I still believe the E-cores are going to make a positive mark especially in the mid-range, and AMD is pricing their CPUs wrong and needs correction:

13600K = 7700X = $349
13500 = 7600X = $249

AMD is wishfully thinking that nobody will care about the massive MT lead on the 13600K after it spent the last 5 years preaching that more cores = better.
 
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There are those that will cant read or comprehend comparisons like this in favor of actual reviews by app,, i.e. blender or Heaven.
 
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Raptor cove still superior on an older node.. intel architecture is more advanced

To say that you must also say that power consumption doesn't matter, and also that you have excellent cooling to maintain those boost levels.

What happens when the AMD chip.can run at higher frequency with the same cooling and thus outperforms the Intel?

The truth is, we don't know until we get reviews we trust, and that osnt going to happen for awhile yet.
 
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ES samples locked to randomly low frequency, from random guy on twitter, on software that can have huge variance depending on compiler options and even greater changes between compilers used?

Let's make conclusions.
 
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To say that you must also say that power consumption doesn't matter, and also that you have excellent cooling to maintain those boost levels.

What happens when the AMD chip.can run at higher frequency with the same cooling and thus outperforms the Intel?

The truth is, we don't know until we get reviews we trust, and that osnt going to happen for awhile yet.
No way in hell zen 4 will be easier to cool than Raptorlake. Not a chance in hell. Zen 3 wasn't, and Zen 4 is a smaller chip, while raptorlake is bigger, so yeah. Don't count on that. At all. It will be a hell to cool even the small 7600x
 
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The big surprise here is just how good the "Gracemont" E-cores are in SPECint. OneRaichu made a distinction between the "Gracemont" E-cores of "Alder Lake" (GLC-12) and those of "Raptor Lake" (GLC-13,) as the latter have double the amount of shared L2 cache per E-core cluster. The E-core is fast approaching IPC levels comparable to that of "Skylake," which really is Intel's calculation in giving its processors a large number of E-cores next to a small number of P-cores. The idea is that the E-cores will soak up all the moderately-intensive compute workloads and background processes, keeping the P-cores free for gruelling compute-heavy tasks.
Why is that a surprise? That E-cores were Skylake-ish at performance was found quickly when Alder Lake came out and reviewers and enthusiasts started testing. There are two big downsides though - this only applies to Integer loads - E-cores suck at FP - and E-Cores do not have HyperThreading/SMT.
 
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No way in hell zen 4 will be easier to cool than Raptorlake. Not a chance in hell. Zen 3 wasn't, and Zen 4 is a smaller chip, while raptorlake is bigger, so yeah. Don't count on that. At all. It will be a hell to cool even the small 7600x
Sure thing boss….


1663304514834.png
 
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Sure thing boss….


View attachment 261838
Thanks for proving my point. The 12600k consumes more than the 5800x yet it's 10c cooler.
 
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IPC is not a constant. Or better to say it is a constant only in linear extrapolations. 3.6GHz extrapolated to 4.0GHz is good enough, but becomes difficult to swallow when extrapolated to 5.0GHz.

Being screwed by IMC/DRAM is part of the game because memory subsystem are part of the CPU design. And memory level parallelism hasn't even get that far to the IMC yet, because MLP is part of the microarchitecture's load/store subsystem. MLP is a microarchitecture feature to park cache-missed memory access aside. "How fast the cores are generating cache misses" vs "how fast memory is resolving them" is guaranteed to have an impact (Imaging the cores are generating them 40% faster than usual, and also becomes 40% more "impatient" for results while the resolution time does not change or even degrades). There are far more quirks than MLP in the microarchitecture that is frequency sensitive (the previous process also puts pressure on other out-of-order mechanisms). So IPC not only needs to be discussed in terms of program, memory, bus, caches, etc. It also needs to be discussed in terms of frequency. There was some IPC claims cheated using a few hundred MHz.
It is constant (and again, task depending), as IMC shouldn't be counted in it (instructions are executed in registers/cache, not RAM). Sure IMC efficiency is important for CPU speed overall, but that's not what IPC is meant to measure. But let's drop this IMC vs. IPC for now.
My main issue with MLP you are so focused on, is that those are early platform samples.
There is no point in testing them "to the limit", since they both may still have pretty big bugs inside the Agesa/uCode that can be addressed only after more people start using them.
If they are performance impacting ones, results you did before can only be used as reference, as they do not represent actual performance anymore.
 
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you're conveniently ignoring the 5950x.
Im not, that also proves the point even better. The 5950x is double the die space of a 5800x,measuring around 170mm2. The 7950x will be at 140mm2. For comparisons sake, raptorlake will be over 250mm2. Long story short, grab a 7950x and a 13900k, put them both at 200w and test them with the same cooler. Ill eat my hat if the 13900k isnt considerably cooler.
 
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Im not, that also proves the point even better. The 5950x is double the die space of a 5800x,measuring around 170mm2. The 7950x will be at 140mm2. For comparisons sake, raptorlake will be over 250mm2. Long story short, grab a 7950x and a 13900k, put them both at 200w and test them with the same cooler. Ill eat my hat if the 13900k isnt considerably cooler.
the die area is the same, only some cores are disabled on the 5800x.
Also unless you're doing some insane overclocks the 7950x will never reach 200 Watt, unlike the 13900k.
And that's the underlying issue and why intel's latest CPUs are hard to keep cool.
 
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the die area is the same, only some cores are disabled on the 5800x.
Also unless you're doing some insane overclocks the 7950x will never reach 200 Watt, unlike the 13900k.
And that's the underlying issue and why intel's latest CPUs are hard to keep cool.
Dont think thats true. 5800x has one ccd measuring 85mm2. 5950x has 2 ccds measuring double that.

When it comes to cooling, what i mean by easy or hard to cool is iso wattage with the same cooler. With a tdp of 170w the 7950x will probably go above 200w even at stock.
 
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