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AMD Announces RDNA 3 GPU Launch Livestream

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DLLS3/RT is pure bazinga

Untrue and TRUE numbers disagrees with that ~ opinion ~ completely.

RT, etc. and its global adoption will only grow by magnitudes that will soon be to complex to track anymore.

Mostly every past, current, and future AAA titles down to indie titles supports RT, etc. and only the ~ few (inferior devs, potato rig users, etc.) ~ are having issues with this inevitable change.

"The many ALWAYS outweighs the few... or the one!" :laugh:

 
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RT, etc. and its global adoption will only grow
At this point we can say "I've heard that YEARS ago" mkay?

At the moment, it barely makes a hands down positive visual effect but is GUARANTEED to tank your FPS and even the latest $1600 card is brought to its knees when running last gen game with RT enabled.

future AAA titles
Are years away and won't run on current gen hardware anyhow.


The "list of games" just stresses that RT is a gimmik at this point: when even RT proponents name only 3 games in which RT even matters, and one of those 3 is Control, that is not only green sponsored (and runs a different codepath on NV cards, cough, making it a lovely benchmark game), but also happens to be a game that looks like 2007 with RT disabled.

Inb4 the next disappointing result ;)
Remind us of the previous "disappointing result" be so kind.
1666640647611.png

But let it be at AMD.
 
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At this point we can say "I've heard that YEARS ago" mkay?

Read the above link I attached earlier. No need to debate on this any longer (but, many supported future Indie/AAA RT/DLSS titles are still missing even from that article). :laugh:

At the moment, it barely makes a hands down positive visual effect

Again... that's VERY subjective... and...
"The MANY... ALWAYS... outweighs the few... or the one!" :roll:
 
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N32 I had the impression that the leak was 200+4*37.5mm² (other sites rounding the MCDs at 38mm² also), is 4*36mm² now the latest info?

I may just be mixing up the MCD and v-cache die used for thr 5800X3D.
 
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Shouldn't AMD have an edge given its using multiple nodes?
That's a good point - they definitely have a lot of flexibility, both from multiple nodes, smaller die designs due to MCM, and the ability to shuffle wafer orders around to serve various product stacks (used to be 7nm: Zen 3 CCDs, Navi 21, 22, 23m, XSX and PS5 APUs; 6nm: Navi 24; 12nm: IODs; now instead it's 5nm: Zen 4 CCDs, Navi 3x compute dice (several, I assume); 6nm: GPU memory/IO dice, Zen4 IODs, Navi 24, PS5 APUs, (and a further bunch on 7nm still)). Especially as several of these nodes at TSMC share parts of their processing pipelines they likely have a ton of flexibility in scaling back one die in favor of another etc. And the cost savings and yield increases from MCM GPUs really shouldn't be ignored either.
 
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