AMD Introduces Alveo MA35D Media Accelerator

[btarunr]

AMD today announced the AMD Alveo MA35D media accelerator featuring two 5 nm, ASIC-based video processing units (VPUs) supporting the AV1 compression standard and purpose-built to power a new era of live interactive streaming services at scale. With over 70% of the global video market being dominated by live content, a new class of low-latency, high-volume interactive streaming applications are emerging such as watch parties, live shopping, online auctions, and social streaming.

The Alveo MA35D media accelerator delivers the high channel density, with up to 32x 1080p60 streams per card, power efficiency and ultra-low-latency performance critical to reducing the skyrocketing infrastructure costs now required for scaling such compute intensive content delivery. Compared to the previous generation Alveo U30 media accelerator, the Alveo MA35D delivers up to 4x higher channel density, 4x max lower latency in 4K and 1.8x greater compression efficiency to achieve the same VMAF score—a common video quality metric.



"We worked closely with our customers and partners to understand not just their technical requirements, but their infrastructure challenges in deploying high-volume, interactive streaming services profitably," said Dan Gibbons, general manager of AECG Data Center Group, AMD. "We developed the Alveo MA35D with an ASIC architecture tailored to meet the bespoke needs of these providers to reduce both capital and operating expenses for delivering immersive experiences to their users and content creators at scale."

Purpose-Built Video Processing Unit
The Alveo MA35D utilizes a purpose-built VPU to accelerate the entire video pipeline. By performing all video processing functions on the VPU, data movement between the CPU and accelerator is minimized, reducing overall latency and maximizing channel density with up to 32x 1080p60, 8x 4Kp60, or 4x 8Kp30 streams per card. The platform provides ultra-low latency support for the mainstream H.264 and H.265 codecs and features next-generation AV1 transcoder engines delivering up to a 52% reduction in bitrate for bandwidth savings versus a comparable software implementation.

"AMD's announcement of the new Alveo MA35D add-in card is an exciting advancement of video acceleration for data centers and is an important step in building out a fully-fledged ecosystem to support royalty-free, high-definition video devices, products, and services," said Matt Frost, Alliance for Open Media Chair. "Live streaming providers are looking for higher density, lower power, lower latency AV1 solutions and by addressing these, Alliance members such as AMD are helping facilitate AV1 deployment and overall adoption."

AI-Enabled, Intelligent Video Pipeline
The accelerator features an integrated AI processor and dedicated video quality engines designed to improve the quality of experience at reduced bandwidth. The AI processor evaluates content, frame-by-frame, and dynamically adjusts encoder settings to improve perceived visual quality while minimizing bitrate. Optimization techniques include region-of-interest (ROI) encoding for text and face resolution, artifact detection to correct scenes with high levels of motion and complexity, and content-aware encoding for predictive insights for bitrate optimization.

Cost-Effectively Scale Interactive Media
Scaling high-volume streaming services requires maximizing the number of channels per server while minimizing power and bandwidth-per-stream. By delivering up to 32x 1080p60 streams per card at 1 watt per stream, a 1U rack server equipped with 8 cards delivers up to 256 channels to maximize the number of streams per server, rack or data center.

Software Dev Kit and Product Availability
The platform is accessible with the AMD Media Acceleration software development kit (SDK), supporting the widely used FFmpeg and Gstreamer video frameworks for ease of development.

Alveo MA35D media accelerators are sampling now with production shipments expected in Q3. To accelerate development, an Early Access Program is available to qualified customers with comprehensive documentation and software tools for architectural exploration.

For more information, visit the product page.

View at TechPowerUp Main Site

 

[LabRat 891]

Oh, hey! This is the kinda product AMD's new Computing and Graphics head used to be 'in charge of'

AMD Names Jack Huynh Senior VP and GM of Computing and Graphics

AMD today announced that Jack Huynh has been named senior vice president and general manager of Computing and Graphics following the retirement from AMD of Rick Bergman, currently the executive vice president of Computing and Graphics. Bergman will remain at AMD through the second quarter to...

www.techpowerup.com

Neat.

 

[TheLostSwede]

Better pic. Apparently US$1,595 a pop.

AMD、32本の1080pビデオを35Wでリアルタイム変換できるカード

　AMDは、動画配信サービスなどのメディアサーバー向けのアクセラレータカード「Alveo MA35D」を発表した。サンプル提供中で、量産出荷は2023年第3四半期を予定。価格は1,595ドル。

pc.watch.impress.co.jp

 

[LabRat 891]

Better pic. Apparently US$1,595 a pop.

AMD、32本の1080pビデオを35Wでリアルタイム変換できるカード

　AMDは、動画配信サービスなどのメディアサーバー向けのアクセラレータカード「Alveo MA35D」を発表した。サンプル提供中で、量産出荷は2023年第3四半期を予定。価格は1,595ドル。

pc.watch.impress.co.jp

I've never seen a PCIe edge conn. like that. Is it CXL-interface?
Also, do I see an EDSFF NVMe connector on there?

edit: nope (.pdf off xilinx's site)

BOARD SPECIFICATIONS Form-Factor • HHHL, Single-slot Host Interface • PCIe® Gen4/Gen5 x8; bi-furcated x4, x4 • SR-IOV Memory • 16GB LPDDR5 Typical Power • 35W (50W TDP), passive cooling

 

[The_Enigma]

Hmm. Does Plex support this yet?

 

[LabRat 891]

Hmm. Does Plex support this yet?

Legit question.

Still seems hilarious asking about a 'consumer' application of a paper-launched/announced ASIC card, aimed squarely at industry use.

Kinda like if I asked if this card would pair well with my 6500XT (which, lacks AV1).

 

[Steevo]

Places like hotels just jizzed in their pants. Whole media rooms can now be just a rack in a room.

Now make the consumer version of this card with multiple inputs including OTA programming again.

 

[TheLostSwede]

Places like hotels just jizzed in their pants. Whole media rooms can now be just a rack in a room.

Now make the consumer version of this card with multiple inputs including OTA programming again.

I think this is more for the likes of streaming services, as this would save them a lot on the power bill, especially as AV1 is something of a dog to encode.

 

[LabRat 891]

Places like hotels just jizzed in their pants. Whole media rooms can now be just a rack in a room.

Now make the consumer version of this card with multiple inputs including OTA programming again.

Ahh, the days when ATI made analog and digital tuners.
I almost bought a PCIe x1 Diamond HD 650 recently, but Diamond only had drivers continually developed for the USB version.

 

[Steevo]

Ahh, the days when ATI made analog and digital tuners.
I almost bought a PCIe x1 Diamond HD 650 recently, but Diamond only had drivers continually developed for the USB version.

I had a 750 PCIe card that worked great with OTA stuff and WMC with add ins. If you modify the .inf file and change a few things the newer drivers worked on Windows 7 and 10 for awhile, I pulled the card when the remote broke and we bought a big smarter TV. Every update to windows 10 deletes the WMC install and it was becoming a PITA to keep it installed.

I think this is more for the likes of streaming services, as this would save them a lot on the power bill, especially as AV1 is something of a dog to encode.

Hotels spend between 10 and 30$ a month per room for in room besides the hardware cost. The hardware has been huge hot multiplexers in racks for existing cable. Now they can use a workstation and add some midgrade network hardware to distribute the load for a 10th the price.

 

[Wirko]

Is it CXL-interface?

CXL doesn't seem to define any specific connectors, it's a set of specifications built on top of PCIe 5.

System Considerations for Compute Express Link™

Attached Devices - form factors, connectors, backplanes By: Sandeep Dattaprasad, Technical Application Lead, Microchip Technology Inc. Introduction Compute Express Link™ (CXL™) addresses the growing memory bandwidth and capacity needs for processors to accelerate high-speed computing...

www.computeexpresslink.org

 

[LabRat 891]

I'm somehow in a state of superposition. I'm concurrently correct and incorrect.

CXL doesn't seem to define any specific connectors, it's a set of specifications built on top of PCIe 5.

System Considerations for Compute Express Link™

Attached Devices - form factors, connectors, backplanes By: Sandeep Dattaprasad, Technical Application Lead, Microchip Technology Inc. Introduction Compute Express Link™ (CXL™) addresses the growing memory bandwidth and capacity needs for processors to accelerate high-speed computing...

www.computeexpresslink.org

I stand correct(ed), from your link:

leveraging the existing PCI Express® (PCIe®) 5.0 physical layer, electricals and infrastructure.

After thinking on it, Gen5 edge connectors' pins are probably shorter on-purpose for only the absolutely necessary trace length, for 32Ghz(?) signal(ing) Link-integrity. Basically: They probably look weird in the render for Gen4 backwards-compatibility from Gen5(/CXL, which isn't a physical interface).

 

[Ferrum Master]

After thinking on it, Gen5 edge connectors' pins are probably shorter on-purpose for only the absolutely necessary trace length, for 32Ghz(?) signal(ing) Link-integrity. Basically: They probably look weird in the render for Gen4 backwards-compatibility from Gen5(/CXL, which isn't a physical interface).

Let's not be so hasty.

That CGI image is trash made by a Stupid Artists, look at the traces, they are shifted or mirrored, the traces that should go to the PCIE are at the right edge and the PCIe itself is not connected. Same applies to that interface. You need a real spec and picture to understand what kind of animal it is.

 

[Tomorrow]