- Joined
- Aug 19, 2017
- Messages
- 2,579 (0.97/day)
Chinese company Loongson, specializing in creating processors for usage in mainland China, has been steadily working on enabling its next-generation Loongson 3A6000 CPUs. Aiming to provide the performance level of Intel Willow Cove and AMD Zen 3, these new CPUs will use Loongson's custom LoongArch Instruction Set Architecture (ISA) with a new set of 64-bit superscalar LA664 cores. Today, thanks to the report from Phoronix, we find out that Loongson has submitted some Linux patches that enable the upcoming 3A6000 CPUs to work with Linux-based operating systems at launch. Interestingly, as the new CPU generation gets closer to launch, more Linux kernel patches begin to surface.
Today's kernel patches focus on supporting the hardware page table walker (PTW). As PTW can handle all fast paths of TLBI/TLBL/TLBS/TLBM exceptions by hardware, software only needs to handle slow paths such as page faults. Additionally, in the past, LoongArch utilized "dbar 0" as a complete barrier for all operations. However, this full completion barrier severely impacted performance. As a result, Loongson-3A6000 and subsequent processors have introduced various alternative hints. Loongson plans to ship samples to select customers in the first half of 2023, so we could see more information surfacing soon.
View at TechPowerUp Main Site | Source
Today's kernel patches focus on supporting the hardware page table walker (PTW). As PTW can handle all fast paths of TLBI/TLBL/TLBS/TLBM exceptions by hardware, software only needs to handle slow paths such as page faults. Additionally, in the past, LoongArch utilized "dbar 0" as a complete barrier for all operations. However, this full completion barrier severely impacted performance. As a result, Loongson-3A6000 and subsequent processors have introduced various alternative hints. Loongson plans to ship samples to select customers in the first half of 2023, so we could see more information surfacing soon.
View at TechPowerUp Main Site | Source