New Generation of AMD Threadripper "Storm Peak" Mentioned on CPU-Z

[DemonicRyzen666]

In Ryzen systems, it's a known fact that AMD reused the I/O die for the X570 chipset. Did they do the same with any of the Epyc/TR chipsets?

There isn't really a chipset in SP3 scoket in server as all the I/o is done by the I/O die on the cpu. There isn't a need for one.

 

[ValenOne]

In Ryzen systems, it's a known fact that AMD reused the I/O die for the X570 chipset. Did they do the same with any of the Epyc/TR chipsets?

For each PCIe generation, AMD's PCIe implementation is reused and the number of PCIe lanes can scale according to market segmentation.

I've bought a great 3990X getting a very nice workstation with 64 cores and enough RAM (256) that enabled me to have many NVMe drives, GPUs and a 40GbE NIC. Then I've bought a second one and a third one. We ended up with 7 Threadripper machines and many new builds were AMD Zen 3.

AMD lied to me and then doubled the price, adding memory channels and PCIE lanes, but still, killing my upgrade path and forcing double the price. Then ignored us as customers.

I know I might not be relevant with my small company, but for the reason AMD did what they did, since then all of my new 57 machines for all my developers were Intel Core.
All of our GPUs (90 units) were Nvidia.

Even if AMD releases a better Threadripper this time, our first purchase of 2024 Q1 budget will be 56-core Xeons. So far it looks to be 5 of those 3990X replaced with 3 more probable. Yes, I am aware they fall into Pro and more expensive bracket and worse performance than the Threadripper 7000.
But I don't care. As small as statement that is, it is one from my perspective. Half a million dollars is not much for AMD, but it will go to Intel's account.

Threadripper Pro 5000 series (sWRX80 socket) has Zen 3 and PCIe implementation is version 4.0 and memory controller implementation is DDR4 i.e. it's effectively equivalent to AM4 Zen 2/Zen 3 SoC Northbridge's and X570's PCIe 4.0 implementation. Don't expect special treatment for server/workstation scaled-up AM4 signaling implementation with a drop-in Zen 4 upgrade.

sWRX80 socket has eight memory controller DDR4 scaling.

Sapphire Rapids LGA 4677 has PCI 5.0 and DDR5 implementation and eight memory controller DDR5 scaling. The predecessor LGA 4189 (DDR4 and PCI 4.0 implementation) is not compatible with LGA 4677. https://en.wikipedia.org/wiki/Ice_Lake_(microprocessor)

LGA 7529 is the sucessor to LGA 4677. https://en.wikipedia.org/wiki/LGA_7529​

PCIe lane scales according to market segmentation.

There isn't really a chipset in SP3 scoket in server as all the I/o is done by the I/O die on the cpu. There isn't a need for one.

PCIe version's implementation can occur on SoC's North Bridge and South Bridge chipsets.

AMD's IO chip is just the North Bridge.

 

[DemonicRyzen666]

PCIe version's implementation can occur on SoC's North Bridge and South Bridge chipsets.
AMD's IO chip is just the North Bridge.

Doing that would be a complete waste of time & latency on servers.
There is no chipset on the SP3 socket server boards Which use basically the same socket. If the SP3 boards have a chipset, it's one for minor video output. You can go look on newegg, If you don't believe me. The only reason WRX80 has a chipset for is SATA ports mostly & usb c/3.0/2.0 ports. The WRX80 & TRX40 board don't even have HD Audio chips on them. You have to buy a sound card for HD Audio. a few WRX80 boards also have the ability to basic video too.

 

[ValenOne]

Doing that would be a complete waste of time & latency on servers.
There is no chipset on the SP3 socket server boards Which use basically the same socket. If the SP3 boards have a chipset, it's one for minor video output. You can go look on newegg, If you don't believe me. The only reason WRX80 has a chipset for is SATA ports mostly & usb c/3.0/2.0 ports. The WRX80 & TRX40 board don't even have HD Audio chips on them. You have to buy a sound card for HD Audio. a few WRX80 boards also have the ability to basic video too.

Are you claiming PCB electronic circuit requirements for PCIe are different between South Bridge's and SoC's Northbridge's PCIe implementation?

From

AMD Ryzen 9 3900X and Ryzen 7 3700X Review: Zen 2 and 7nm Unleashed

AMD's Ryzen 3000 series promises more performance and value via the benefits of the 7nm process and Zen 2 microarchitecture.

www.tomshardware.com

The actual X570 chipset is a 14nm variant of the 12nm I/O die inside the Ryzen 3000-series processors, which is a clever reuse of the technology that ultimately lowers costs.

AMD's products are built-on common building Intellectual property (IP) blocks.

AMD's "I/O die" is the Northbridge which includes a PCIe and memory controller implementation. AMD's "I/O die" Intellectual property (IP) blocks can be recycled for other copy-and-paste engineered Southbridge PCIe-based chips.

The PCB electronic circuit requirements for Southbridge PCIe 4.0 implementation are the same as "I/O die" Northbridge's PCIe 4.0 implementation.

My argument is at the PCIe electrical implementation on per lane basis.

Zen 2 / Zen 3-era PCIe 4.0 / DDR4 implementation is different from Zen 4-era PCIe 5.0 / DDR5 implementation. You're not going to get Zen 4 on a legacy PCIe 4.0 / DDR4-based PCB board design.

AM4 didn't require major memory controller changes e.g. additional memory controllers and a switch from DDR3 to DDR4.

If there's a requirement for the 256-bit bus for mainstream desktop PCs, then AM5 change will need to be changed.

There isn't really a chipset in SP3 scoket in server as all the I/o is done by the I/O die on the cpu. There isn't a need for one.

SP3 SoC has a built-in chipset i.e. AMD's PCIe-based "I/O die" Northbridge on the chip package.

PCB electronic circuit requirements for SATA and HD Audio are low-end.

 

[DemonicRyzen666]

Are you claiming PCB electronic circuit requirements for PCIe are different between South Bridge's and SoC's Northbridge's PCIe implementation?

Yes, they are because one is on an "INTER POSER" on the cpu package, Whioch are a lot smaller. The other is on BGA connection to the board, which are larger. The difference is the latency in the connection. Which matters more for the cpu chiplets than other secondary connections.

I wouldn't really call the I/O die a chipset itself. Since certain AM4 board that can do 8x first slot /8x second slot, They Still have a Pci-express hub switch (which cause latency & stuttering) to just split up the lanes from coming from the cpu. The major of AM4 board though will do 16x first slot/4x second slot, without the hub switch. Those lanes don't even take up the M.2 Nvme lanes usually. Severs general just us the U.2 connection which uses some of the pci-express lanes.

 

[ValenOne]

Yes, they are because one is on an "INTER POSER" on the cpu package, Whioch are a lot smaller. The other is on BGA connection to the board, which are larger. The difference is the latency in the connection. Which matters more for the cpu chiplets than other secondary connections.

I wouldn't really call the I/O die a chipset itself. Since certain AM4 board that can do 8x first slot /8x second slot, They Still have a Pci-express hub switch (which cause latency & stuttering) to just split up the lanes from coming from the cpu. The major of AM4 board though will do 16x first slot/4x second slot, without the hub switch. Those lanes don't even take up the M.2 Nvme lanes usually. Severs general just us the U.2 connection which uses some of the pci-express lanes.

TUF X670E's single PCIe 16X slot can still split with PCIe 8X/ 8X riser card e.g. https://wisp.net.au/asrock-rack-pcie-riser-2s.html 3rd party PCIe switch is not required.

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Gigabyte X570 UD's single PCIe 16X slot (PCIEX16) can still split with the mentioned PCIe 8X/ 8X riser card and a BIOS setting.

The rest of the PCIe slots are from the X570 chipset i.e. two PCI Express x16 slots supporting PCIe 4.0/3.0 running at X4 and two PCI Express x1 slots, supporting PCIe 4.0 / 3.0.