Chinese Research Team Uses AI to Design a Processor in 5 Hours

[Fouquin]

A group of researchers in China have used a new approach to AI to create a full RISC-V processor from scratch. The team set out to answer the question of whether an AI could design an entire processor on its own without human intervention. While AI design tools do already exist and are used for complex circuit design and validation today, they are generally limited in use and scope. The key improvements shown in this approach over traditional or AI assisted logic design are the automated capabilities, as well as its speed. The traditional assistive tools for designing circuits still require many hours of manual programming and validation to design a functional circuit. Even for such a simple processor as the one created by the AI, the team claims the design would have taken 1000x as long to be done by humans. The AI was trained by observing specific inputs and outputs of existing CPU designs, with the paper summarizing the approach as such:

(...) a new AI approach, which generates large-scale Boolean function with almost 100% validation accuracy (e.g., > 99.99999999999% as Intel) from only external input-output examples rather than formal programs written by the human. This approach generates the Boolean function represented by a graph structure called Binary Speculation Diagram (BSD), with a theoretical accuracy lower bound by using the Monte Carlo based expansion, and the distance of Boolean functions is used to tackle the intractability.

The resulting RISC-V32IA processor dubbed "CPU-AI" was taped out on a 65 nm lithography and operates at 300 MHz—with up to 600 MHz being possible—and is able to successfully run Linux, SPEC CINT 2000, and Dhrystone, performing similarly to Intel's venerable i486SX from 1991. Though they did not qualify which speed of i486SX they compared against, be it 16, 25, or 33 MHz. They suggest that performance could still be improved with augmented algorithms, and In the conclusion of the paper the research team speculates on a self-evolving machine that can design its own iterative upgrades and improvements. While that may be far off in the future the AI did independently discover the von Nuemann architecture through its observation of inputs and outputs. This leads to speculation that the algorithm can be tweaked to focus on fine-grain architecture optimization to work around traditional bottlenecks that it may encounter, a task which can usually be quite difficult for human engineers to accomplish.



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[Solaris17]

Makes sense, everyone already used it in a limited capacity as is. The next logical step was using it for entire generation. I am sure or rather it /should/ be manually looked over before you know your burning $$ on fab time but otherwise; cool we are starting to enter this phase of design. Other companies will or are following suite, and im sure things like mobo phy etc will be next if they arent already.

 

[zlobby]

Hey, ChatGPT...

 

[Divide Overflow]

Next comes the automation of chip and manufacturing foundries, because there's lots of efficiencies to be had with AI there, right?
Humans are writing themselves right out of the equation.

 

[kondamin]

A 300mhz part doing a job at the same speed as a 30 year old part running at 10th the clock?
its a first step I guess, I have a hard time placing he achievement.

could it be given an fpga and try out its own designs and improve upon them?

 

[Fouquin]

A 300mhz part doing a job at the same speed as a 30 year old part running at 10th the clock?
its a first step I guess, I have a hard time placing he achievement.

could it be given an fpga and try out its own designs and improve upon them?

A 30 year old part that took a team of engineers thousands of hours to develop.

The performance aspect is the first thing anyone ever focuses on, but it's incredibly short sighted. The paper details how simple the starting algorithm actually is from an implementation level, and the amount of training required to construct a new processor from scratch using only input/output tracing was fairly reserved. They also did not implement any algorithm changes beyond what it took to start producing accurate results. They didn't even give it an overview of the processors it was tracing, only their inputs and outputs. Yet it 'discovered' the underlying design elements from only that training data. Give it iterative capabilities and train it on much deeper wells of data and even if it takes 100 hours to create a processor it's still exceeding the capabilities of a dedicated team of engineers by literal years.

 

[eidairaman1]

Next comes the automation of chip and manufacturing foundries, because there's lots of efficiencies to be had with AI there, right?
Humans are writing themselves right out of the equation.

Amd tried that with FX in a sense and it didnt bode well for them, however software as of Ryzen finally caught up.

 

[Minus Infinity]

Sorry folks but this is a huge deal. Both incredible and scary but nothing we did not expect would or could happen. This will render USA's tech limits on China moot very quickly.

 

[R-T-B]

Sorry folks but this is a huge deal. Both incredible and scary but nothing we did not expect would or could happen. This will render USA's tech limits on China moot very quickly.

On the same token, don't imagine USA isn't working on the same.

 

[Bomby569]

this is the thing AI is very good at, let it do it's job. And keep it away from the party tricks of using math to guess the next word

 

[Denver]

Uh, I don't think this is relevant. The current level of complexity of chip designs is infinitely higher. Plus, If I'm not mistaken, all large companies use "AI"(Script) at some point in design validation or simulation.

 

[Testsubject01]

[...], all large companies use "AI"(Script) at some point in design validation or simulation.

We are still far from what one could call a proper AI, but neural network based simulations are not just “scripts” in classical terms like those past models were based on.
Further, they will only improve in complexity and scale with time.

Both incredible and scary but nothing we did not expect would or could happen. This will render USA's tech limits on China moot very quickly.

It wasn't a “would” or “could”, but very much a “when” and everyone with the bucks to spend worldwide is implementing machine learning currently.

 

[Tahagomizer]

This is a wonderful achievement. Hardly a new direction, simple machine learning was used to semi-automate some tedious work almost twenty years ago when I had an episode of working with ASIC designers, but this is many levels ahead. Give it a few years of development, more processing power, improved models and the barrier to entry for designing ASICs or even general purpose processors will be much lower.

 

[Fouquin]

Plus, If I'm not mistaken, all large companies use "AI"(Script) at some point in design validation or simulation.

AI/ML assisted integrated circuit design and validation tools exist but still require parameter programming and testing from trained engineers, as noted above. The approach presented in the paper required no validation from any secondary tool, and no human intervention except at tape-out to print it. They generated the BSD from I/O trace and the algorithm designed and validated its own ASIC in under 5 hours from that with zero manual tuning, bug checking, validation, or revising. It did it all on its own.

Excerpt:

Actually, though modern commercial electronic design automation (EDA) tools such as logic synthesis or high-level synthesis tools are available to accelerate the CPU design, all these tools require hand-crafted formal program code as the input. Concretely, a team of talented engineers must use formal programming languages (e.g., Verilog, Chisel, or C/C++) to implement the circuit logic of a CPU based on design specification, and then various EDA tools can be used to facilitate functional validation and performance/power optimization of the circuit logic. The above highly complex and non-trivial process typically iterates for months or years, where the key bottleneck is the manual implementation of the input circuit logic in terms of formal program code.

 

[dragontamer5788]

I already wrote up a post on this elsewhere. Imma copy/paste it really quick: https://www.techpowerup.com/forums/...stable-diffusion-and-more.304892/post-5050639

Risk-v cpu designed for less of 5 hours with using AI.
This comment probably is also suitable to topic for that AI is dangerous for workers places but this topic is old, last comment is before more of two years abd I see no point to reviving it.

In this article, we report a RISC-V CPU automatically designed by a new AI approach, which generates large-scale Boolean function with almost 100% validation accuracy (e.g., > 99.99999999999% as Intel31) from only external input-output examples rather than formal programs written by the human. This approach generates the Boolean function represented by a graph structure called Binary Speculation Diagram (BSD), with a theoretical accuracy lower bound by using the Monte Carlobased expansion, and the distance of Boolean functions is used to tackle the intractability.

These guys invent a new Binary Decision Diagram (calling it a Binary Speculation Diagram), and then have the audacity to call it "AI".

Look, advancements in BDDs is cool and all, but holy shit. These researchers are overhyping their product. When people talk about AI today, they don't mean 1980s style AI. Don't get me wrong, I like 1980s style AI, but I recognize that the new name of 1980s-style is called "Automated Theorem Proving". You can accomplish awesome feats with automated theorem proving (such as this new CPU), but guess what? A billion other researchers are also exploring BDDs (ZDDs, and a whole slew of other alphabet-soup binary (blah) diagrams) because this technique is widely known.

"Chinese AI Team innovates way to call Binary Decision Diagram competitor an AI during the AI hype cycle". That's my summary of the situation. Ironically, I'm personally very interested in their results because BDDs are incredibly cool and awesome. But its deeply misrepresenting what the typical layman considers AI today (which is mostly being applied to ChatGPT-like LLMs, or at a minimum, deep convolutional neural networks that underpin techniques like LLMs).

------------------

Furthermore, standard BDDs can create and verify Intel 486-like chips quite fine. That's just a 32-bit function (64-bits with 2x inputs), probably without the x87 coprocessor (so no 80-bit floats or 160-bit 2x inputs). Modern BDD-techniques that's used to automatically verify say, the AMD EPYC or Intel AVX512 instructions are doing up to 3x inputs of 512-bits each, or ~1536-bits... and each bit is exponential-worst case for the BDD technique. So... yeah... 64-bit inputs vs 1536 isn't really that impressive.

-----------

In fact, the underlying problem is: with only finite inputs and their expected outputs (i.e., IO examples) of a CPU, inferring the circuit logic in the form of a large-scale Boolean function that can be generalized to infinite IO examples with high accuracy.

I literally have an example of this sitting in my 1990s-era BDD textbook. This isn't new at all. This team is overselling their achievement. Albeit my textbook is only on the "textbook" level Reduced Ordered Binary Decision Diagram, with a few notes on ZDDs and the like... but I'm not surprised that "new BDD-style" could lead to some unique advantages.

Now, BSD (or whatever this "Binary Speculation Diagram" thingy is) might be interesting. Who knows? New BDDs are discovered all the time, its an exceptionally interesting and useful field. Necessary to advance the state-of-the-art of CPU design, synthesis, testing. Furthermore, this is exactly the kind of technology I'd expect hardcore chip designers to be using (its obviously a great technique). But... its industry standard. This is what CPU researchers are studying / experimenting with every day for the past 40+ years, I kid you not.

------------

BTW: ROBDDs (and all data-structures based off of BDDs) are awesome. I'd love to divert this topic and talk about ROBDDs, their performance characteristics, #P complete problems, etc. etc. But... its not AI. Its automated theorem proving, its exhaustive 100% accurate search with perfectly accurate designs of perfectness.

They generated the BSD from I/O trace

Its not very hard to build a circuit today if you already have the boolean truth table.

Remember: BDDs (and BSD, being a derivative technique of BDDs), stores the entire truth table of boolean operations. In a highly optimized, compressed fashion in a graph-database yes. But its a complete representation of the boolean function.

Its easy to automatically create a multiplier, if you have the 32x32 exhaustive input list of multiplication already. And indeed, modern verification / testing / BDD data-structures build circuits using this.

 

[mclaren85]

Is that what they called "technological singularity" ?

 

[Jism]

Next comes the automation of chip and manufacturing foundries, because there's lots of efficiencies to be had with AI there, right?
Humans are writing themselves right out of the equation.

That is already going on for at least 10 years, where alot of AI is used in the ground design of chips.

It takes on avg 150 experienced chip designers - what if you could replace half of that workforce and the financial benefit you get from it?

Thats 75 engineers less on a payroll for the next 3 years - with perhaps the job even done better, faster or more efficient.

 

[dragontamer5788]

That is already going on for at least 10 years, where alot of AI is used in the ground design of chips.

It takes on avg 150 experienced chip designers - what if you could replace half of that workforce and the financial benefit you get from it?

Thats 75 engineers less on a payroll for the next 3 years - with perhaps the job even done better, faster or more efficient.

What do you think those chip designers are doing?

They make Verilog or VHDL. This then compiles into RTL or some other lower level language. Eventually, the synthesis programs create a BDD. That BDD then synthesizes into NAND gates to be laid out, and then the autorouter automatically runs the wires between these parts and makes the final layout.

Maybe humans go over the layout and try to assist the autorouter. But all these low level steps are already programs.

All this paper would do is replace the BDD step (fully automated computer program) with BSD, a new data structure that this paper discusses.

------------

Like, imagine if LLVM compiler (aka clang) billed itself as an AI that would reduce programmer time. Like, it's not wrong. There are traditional AI tasks (such as the coloring problem to solve register allocation) and better compilers will allow fewer programmers to accomplish the task of programming.

But it'd be misleading to argue it were an AI to laypeople / lay audience.

 

[Frank_100]

Sorry folks but this is a huge deal. Both incredible and scary but nothing we did not expect would or could happen. This will render USA's tech limits on China moot very quickly.

I guess will all just have to learn to live in peace.

 

[Synthwave]

Sorry folks but this is a huge deal. Both incredible and scary but nothing we did not expect would or could happen. This will render USA's tech limits on China moot very quickly.

It's way more scary than it is incredible though.