Intel Resumes Shipments of Xeon Sapphire Rapids MCC SKUs, Following Firmware Fixes

[T0@st]

Intel's Xeon Sapphire Rapids CPU series has had a bumpy ride so far, with the discovery of bugs resulting in delays pushing proceedings back by more than two years. Units have been shipping out for the past couple of months, but Team Blue ran into more issues in late June—a subset of fourth Generation Intel Xeon Medium Core Count Processors (SPR-MCC) could interrupt normal system operation under certain conditions. Intel confirmed to Tom's Hardware that they were actively investigating the latest bugs, and had paused shipment of affected MCC die-based models (featuring up to 32 cores).

The publication has very recently received an update from their contact at Intel. A company spokesperson stated: "Last week, we informed you (Tom's Hardware) of an issue on a subset of 4th Generation Intel Xeon Medium Core Count Processors (SPR-MCC) that could interrupt system operation under certain conditions. Out of an abundance of caution, we temporarily paused some SPR-MCC shipments while we thoroughly evaluated a firmware mitigation. We are now confident the firmware mitigation addresses the issue. We have resumed shipping all versions of SPR-MCC and are working with customers to deploy the firmware as needed." Specifics about the latest mitigations efforts have not been divulged, but Intel is confident that these fixes will not impact processor performance.



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[P4-630]

but Intel is confident that these fixes will not impact processor performance.

Pfew...

 

[kondamin]

That was faster than I expected.
I hope the company starts getting some wins

 

[Vya Domus]

Intel is confident that these fixes will not impact processor performance

That's a strange thing to say. What do they mean they are "confident" ? This stuff is pretty deterministic, it either affects performance or it doesn't.

 

[R-T-B]

That's a strange thing to say. What do they mean they are "confident" ? This stuff is pretty deterministic, it either affects performance or it doesn't.

If you think CPU workloads are deterministic, well, no. There are so many ways they could test it and still miss an edge case.

 

[Vya Domus]

If you think CPU workloads are deterministic, well, no.

Of course they are, same sequence of instructions should result in the same behavior every time they are being executed, so if you change something it's very easy to determine if performance is affected or not. If your CPU isn't processing workloads in a deterministic manner there is something terribly wrong with it.

There are so many ways they could test it and still miss an edge case.

They make the damn things, they know very well what will affect performance and what wont (spoiler, almost everything does). It should be straight forward to design tests that target specifically the type of workloads that you expect to be impacted, you're effectively looking at only known edges cases, CPUs aren't the black boxes you seem to think they are.

 

[R-T-B]

Of course they are, same sequence of instructions should result in the same behavior every time they are being executed

Same with playing cards, yet how many possibilities are there when they start to interact?

CPUs aren't the black boxes you seem to think they are.

Nor are they the simple machines anymore that you seem to examine them as.

 

[Vya Domus]

Same with playing cards, yet how many possibilities are there when they start to interact?

It's not the same as playing cards, I don't even understand the comparison. It doesn't matter that there are many possibilities, the steps are the same.

Nor are they the simple machines anymore that you seem to examine them as.

They are not simple but they are predictable, if you change something it should not be a mystery as to what effect that might have.

 

[R-T-B]

You really don't get the concept of combinations being harder to predict than single instruction outcomes, do you?

To further complicate matters, every x86 op is actually several "micro-ops" that may differ depending on what the branch predictor thinks, on what has already been executed, etc. tl;dr speculative execution is a helluva drug.