AMD Expected to Increase Microcode Size for Future Processor Technologies

[T0@st]

Phoronix has recently uncovered an intriguing Linux update, with kernel improvements being prepared to handle greater microcode payloads—they believe that "future AMD CPUs will be getting larger microcode patches." The timing could suggest that upcoming Zen 5 processors will be likely candidates to meet new requirements: "Right now the Linux kernel has a maximum microcode patch size for AMD CPUs that is three times the kernel's page size (typically 4K). But with a patch (published on July 20) that will "increase substantially" to eight times the page size. The increase is intentionally quite a magnitude larger in order to avoid future patches further having to bump the patch size limit in later generations." Earlier this month, some GitHub entries demonstrated that AMD engineers had patched Linux 6.5 with updates for "Family 26" (1Ah) CPU enablement," which Phoronix believes to be for next-gen platforms (Zen 5): "It's also not elaborated on why the CPU microcode size will be increasing. In any event the simple patch to bump the AMD CPU microcode limit is now out for review. It's also marked for back-porting to existing stable kernel versions."



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[dont whant to set it"']

So Zen5 got passed the POST stages is what I can also take from this.

 

[TumbleGeorge]

Meanwhile, carrying AMD’s Zen architecture roadmap into 2024 is the Zen 5 architecture, which is being announced today. Given that AMD isn’t yet shipping Zen 4, their details on Zen 5 are understandably at a very high level. None the less, they also indicate that AMD won’t be resting on their laurels, and have some aggressive updates planned.


The big news here is that AMD is terming the Zen 5 architecture as an “All-new microarchitecture”. Which is to say, it’s not merely going to be an incremental improvement over Zen 4.

@anandtech from before 13 months

Apparently AMD is fulfilling what they mentioned about ZEN 5. That they will be working hard on a new architecture with a focus more on the front end of the architecture, though not only there.

 

[HalfAHertz]

They did mention they want to integrate FPGAs into the CPU from Xilinx. Maybe they need the microcode to re-areange the xpga portion of the server CPUs.