PCI-SIG Exploring an Optical Interconnect to Enable Higher PCIe Technology Performance

[mouacyk]

Really, is this where the bottleneck is?

 

[Scrizz]

Interesting. If one fibre optic could carry multiple PCIe lanes... image what you could "dock" a laptop on to...

I mean... that's essentially what Thunderbolt is. The laptop dock part already exists

 

[TheLostSwede]

It irks me that you need to clarify that.

Sorry, just wanted to make it crystal clear, as the press release didn't come with an image.

 

[lemonadesoda]

I mean... that's essentially what Thunderbolt is the laptop dock part already exists

Except faster, longer distances, possibility for airgap wireless connection. This is one step broader than the recent discussion about optical wifi, which i found odd and edge case.

 

[Tek-Check]

With optical pcie, will that be a boon for external connections as well, and replace the likes of occulink and thunderbolt ?

Thunderbolt uses PCIe protocol, so whatever PCI-SIG develops, Thunderbolt could implement in future.

 

[InVasMani]

Except faster, longer distances, possibility for airgap wireless connection. This is one step broader than the recent discussion about optical wifi, which i found odd and edge case.

Really wouldn't a optical PCIE interconnect to a WIFI/BT device effectively reduce latency and bring it up to a closer parity to wifi over a copper pcie interconnect!!? I'm not certain how much latency difference there is with each and what the equilibrium balance between the scenario's would be, but I'd hope it would one would kind of cancel out the other closely.

You'll still have issues with long range wifi, but with reasonable distance I wonder how it changes things. Wifi has already improved a lot on it's own as well, but if you could further improve it with a helping helping of optical interconnect it would be fantastic.

 

[Wirko]

Really, is this where the bottleneck is?

Yes, quite probably.

If you have a computer whose circuit breakers are larger than an average home PC, that is.

 

[Nanochip]

Thunderbolt uses PCIe protocol, so whatever PCI-SIG develops, Thunderbolt could implement in future.

Very true. But I am hoping for a competent alternative to thunderbolt for certain PCIe applications, thunderbolt can be hit or miss depending on the firmware version loaded on the ROM chip or bugs in the motherboard’s UEFI firmware. For example, early versions of Maple Ridge thunderbolt 4 firmware (e.g., 26, 28.x, 29, and 31) were incompatible with hotplugging older thunderbolt 3 devices, particularly those based on JHL6240. That meant even if the device was plugged in at cold boot and enumerated, if the system entered a sleep/wake cycle, the thunderbolt device would be lost until a cold reboot. Or if you hot plugged the device it wouldn’t work. It’s not until several revisions later with NVM36+ that hotplugging support finally came back for those older devices.

With a pure PCIe connection, such as occulink, for example, you need not worry about any of the overhead associated with thunderbolt… you just have a pipe to the PCIe bus. Also, not all motherboard’s have an onboard thunderbolt controller, and those that do cost extra. It would be nice to have an external PCIe ecosystem that isn’t necessarily based on thunderbolt/usb4.

We shall see what happens. Hopefully the next Ridge from Intel, Barlow Ridge, has less bugs in the firmware, because Maple Ridge has been terrible. Titan Ridge was a good generation from Intel.