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AMD Ryzen 8000 "Granite Ridge" Desktop CPUs Could Utilize Same IO Die as Ryzen 7000

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AMD is aiming to launch its Ryzen 8000 desktop CPUs, codenamed "Granite Ridge," at some point next year. The next generation Zen 5 core microarchitecture is expected to arrive alongside (Navi) RDNA 3.5 iGPU cores according to the last batch of Team Red product roadmaps. Today, hardware tipsters Olrak29_ and Kepler_L2 have made claims on social media that part of the Ryzen 7000 CPU legacy will continue with the succeeding desktop processor lineup—we already know that Granite Ridge will exist as a Socket AM5 package, but today's leak proposes that these next-gen chips are lined up to utilize the same IO die as sported by AMD's current Zen 4 desktop family.

These new rumors suggest that the "reused" Ryzen 7000 IOD (I/O Die) chiplet will grant the familiar allocation of 28 PCIe Gen 5 lanes, memory controllers, USB functions, plus RDNA 2 iGPU cores. Wccftech points out that: "...interestingly, AMD lists the Ryzen 7000 "desktop" CPUs with Navi 3.0 support whereas the Radeon 710M iGPU in fact is based on the RDNA 2 graphics core. The next-gen lineup was mentioned to support the newest RDNA 3.5 GPU core which will be coming to the Strix APU family next year but that isn't the case either." The article proposes that "RDNA 3.5 GPU cores on the AM5 platform" could arrive with the advent of upcoming Ryzen APUs—namely 6 nm Rembrandt (6000G) and 4 nm Phoenix (7000G) desktop solutions.



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So not much improvements to memory both in terms of capacity and speed to be expected.
 
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So not much improvements to memory both in terms of capacity and speed to be expected.

After the latest AGESA update AMD CPUs can already run DDR5 8000 more reliably than Intel. The limiting factor is that you can't run those speeds 1:1, so bandwidth goes up but latency ends up being about the same. It's possible that AMD ups memory performance by keeping the same IO die while upping the infinity fabric speed the CPU can handle. Who knows though, this is all speculation. I do expect there to be small improvements to the IO die just due to maturity as well.
 
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After the latest AGESA update AMD CPUs can already run DDR5 8000 more reliably than Intel. The limiting factor is that you can't run those speeds 1:1, so bandwidth goes up but latency ends up being about the same. It's possible that AMD ups memory performance by keeping the same IO die while the infinity fabric speed the CPU can handle. Who knows though, this is all speculation. I do expect there to be small improvements to the IO die just due to maturity as well.


Honestly AMD seems to have figured out memory, and their next best move is cache latency for improved IPC more cores are worthless if you can't keep them busy. I would also wager they will move the IO die to a smaller node and the chiplets to a smaller node, its what they have been doing with success. I have swapped between 6000-8000 speeds and around 65ns is all she will suffer.
 
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Honestly AMD seems to have figured out memory, and their next best move is cache latency for improved IPC more cores are worthless if you can't keep them busy. I would also wager they will move the IO die to a smaller node and the chiplets to a smaller node, its what they have been doing with success. I have swapped between 6000-8000 speeds and around 65ns is all she will suffer.
The cache latencies are already excellent. The core is a much smaller core than Golden Cove and still keeps up. Making the out-of-order structures bigger would be the logical next step for increased IPC. We'll see what knobs the turn in Zen 5.
 
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The cache latencies are already excellent. The core is a much smaller core than Golden Cove and still keeps up. Making the out-of-order structures bigger would be the logical next step for increased IPC. We'll see what knobs the turn in Zen 5.
My bad, I was thinking they were still 20% behind.
 
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My bad, I was thinking they were still 20% behind.
No worries. In fact, AMD has lower latencies for all cache levels.

1693248470269.png
 
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So not much improvements to memory both in terms of capacity and speed to be expected.
They might be able to improve it a bit like how refreshes are, with some process refinement. It also depends on where the bottleneck of the IF is, if it`s in the CPU then that could be improved but if it's in the IO Die then yeah, it's not going to increase. As others have said, the memory controller already seems to be 'good enough' and can run even fast frequencies, but the IF can't handle those.
 
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So just a refresh, huh.
 
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a clear and concise middle ground in terms of good idle cpu package power consumption with good matching motherboard,
than we can talk, same for intel all whats is needed is cheap but well balanced octa or hexa cores priced medium as some quality has its price.
For now cpu idle of amd is way to high for my liking
 
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So not much improvements to memory both in terms of capacity and speed to be expected.

io has nothing todo with that. I/o die won't scale like CPU's if you make these more smaller. So they stick with a node proces that works and provides the best yields possible.

Why waste resources onto a "hub" while the action happens in the CPU cores?
 
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Well the action also happens at IoD, arguably more so. But it's been speculated Zen 4 can't use all the IF links present so there's a lot more upside with the same die.

DRAM Bandwidth​

Zen 4 also moves over to DDR5, which dramatically increases the memory subsystem’s theoretical bandwidth. We saw just above 50 GB/s of read bandwidth using a 5950X equipped with DDR4-3600, or just above 88% of theoretical DRAM bandwidth. Our DDR5-6000 equipped 7950X platform achieved 72.85 GB/s at the same 3 GB test size. On one hand, that’s a notable 43% increase in memory bandwidth. On the other, Zen 4 actually sees a decrease in memory bandwidth efficiency. A 128-bit DDR5-6000 bus can theoretically reach 96 GB/s, and we only achieved 76% of that.

One theory is that Zen 4’s DRAM bandwidth is limited by the link between the memory controller and fabric. AMD’s diagram shows that the link is 32 bytes per cycle wide in both directions.


However, that is unlikely. FCLK in our testing was set to 2000 MHz. 32 bytes per cycle at 2000 MHz works out to 64 GB/s, which is well under what we were able to achieve. UCLK runs at 3000 MHz, or half of DDR transfer rate. 32 bytes per cycle at 3000 MHz should mean that full DDR bandwidth can be achieved in either direction. That does not rule out a bandwidth limitation at the link between Infinity Fabric and the memory controller, but it does suggest the link to fabric is wider than AMD’s diagram suggests.

Another related theory is that bandwidth can be improved if we mix reads and writes in a 1:1 ratio, since the link can deliver 32 bytes in each direction. However, mixing reads and writes introduces a different problem at the DRAM level. Unlike links to cache, the DRAM bus is not bidirectional and has to be explicitly switched between read and write modes. These switches are not free and force the memory bus to idle for a number of cycles, reducing achieved bandwidth. Therefore, we don’t see a significant bandwidth increase when using an access pattern that mixes reads and writes.
 
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Considering that RDNA 3 doesn't offer any significant IPC uplift over RDNA 2, this news probably won't shock anyone.
 
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Considering that RDNA 3 doesn't offer any significant IPC uplift over RDNA 2, this news probably won't shock anyone.

What does CPU have to do with GPU? This is about a CPU with a supposed 20%IPC uplift (with who knows what security issues they learned from the blue guys) over the 7000 series using the same IO die.
 
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Considering that RDNA 3 doesn't offer any significant IPC uplift over RDNA 2, this news probably won't shock anyone.

It's something completely new and they are the first to actually implement CCD's and IO dies onto a GPU. Give it a few generations and it will be massive.
 
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What does CPU have to do with GPU? This is about a CPU with a supposed 20%IPC uplift (with who knows what security issues they learned from the blue guys) over the 7000 series using the same IO die.
It's about the iGPU of said CPUs. Two RDNA 3 CUs shouldn't perform much (if any) better than two RDNA 2 CUs.

It's something completely new and they are the first to actually implement CCD's and IO dies onto a GPU. Give it a few generations and it will be massive.
Sure, that's cool, I agree. I was only talking about the iGPU on the Ryzen IO die.
 
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AMD is more efficient at idle:

View attachment 311077
I wonder how they got those numbers. The CPU only power on any chiplet Ryzen with EXPO/XMP enabled is in the low to mid 20s (W) at idle. Every single modern Intel CPU eats way less than that, as far as I know.
 
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I wonder how they got those numbers. The CPU only power on any chiplet Ryzen with EXPO/XMP enabled is in the low to mid 20s (W) at idle. Every single modern Intel CPU eats way less than that, as far as I know.
With balanced power plan intel 12 and 13th sit at 3w or less. Browsing the web watching YouTube and all that less than 10w.

But guru3d is measuring system power draw, so different mobos
 
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So just a refresh, huh.

is it the same core design?

AMD is more efficient at idle:

View attachment 311077

IMO no and this graphic is wrong.

I would say right now ryzen 7000 is 15 watt higher power consumption at idle. Something like ~50watt vs ~65watt (including dedicated gpu).

Its tolerable because a) i don't use pc for it to idle and at work it's the most efficient b) amd have very efficient mobile chips and 5000g chips so i expect improvement here c) it's a desktop pc.
 
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is it the same core design?



IMO no and this graphic is wrong.

I would say right now ryzen 7000 is 15 watt higher power consumption at idle. Something like ~50watt vs ~65watt (including dedicated gpu).

Its tolerable because a) i don't use pc for it to idle and at work it's the most efficient b) amd have very efficient mobile chips and 5000g chips so i expect improvement here c) it's a desktop pc.
Yes, mobile amd is great, but the desktop isn't. It's not efficient at work either. Unless your work is rendering 24/7 and you have a 7950x, amd is less efficient.

Case in point, my work involves lots of excels, words pdfs and browser tabs. My intel does that at 5 to 15w, no amd cpu can get anywhere near that level.
 
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I wonder how they got those numbers. The CPU only power on any chiplet Ryzen with EXPO/XMP enabled is in the low to mid 20s (W) at idle. Every single modern Intel CPU eats way less than that, as far as I know.

Idle power consumption varies based on the memory configuration on both Intel and AMD platforms. Hence why you see some variance:

1693294489259.png


IMO no and this graphic is wrong.

I would say right now ryzen 7000 is 15 watt higher power consumption at idle. Something like ~50watt vs ~65watt (including dedicated gpu).

Its tolerable because a) i don't use pc for it to idle and at work it's the most efficient b) amd have very efficient mobile chips and 5000g chips so i expect improvement here c) it's a desktop pc.

And I assume you think the above provided graph is incorrect as well? What evidence do you have that would disprove the results of multiple professional reviews?
 
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Idle power consumption varies based on the memory configuration on both Intel and AMD platforms. Hence why you see some variance:

View attachment 311096



And I assume you think the above provided graph is incorrect as well? What evidence do you have that would disprove the results of multiple professional reviews?
The above graph is using high performance power plan. In which case yes, Intel draws around 18 to 20w. Balanced power plan drops that to below 3. Amd sadly doesn't drop any further cause of the IO die. If you had the cpus in question, you would know.

But regardless, in your precious post you said amd is better at idle, and now you just posted a graph that disproves your own point. Wtf
 
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