AMD Mobile Processor Lineup in 2025 Sees "Fire Range," "Strix Halo," and Signficant AI Performance Increases

[btarunr]

With Windows 11 23H2 setting the stage for increased prevalence of AI in client PC use cases, the new hardware battleground between AMD and its rivals Intel, Apple, and Qualcomm, will be in equipping their mobile processors with sufficient AI acceleration performance. AMD already introduced accelerated AI with the current "Phoenix" processor that debuts Ryzen AI, and its Xilinx XDNA hardware backend that provides a performance of up to 16 TOPS. This will see a 2-3 fold increase with the company's 2024-25 mobile processor lineup, according to a roadmap leak by "Moore's Law is Dead."

At the very top of the pile, in a product segment called "ultimate compute," which consists of large gaming notebooks, mobile workstations, and desktop-replacements; the company's current Ryzen 7045 "Dragon Range" processor will continue throughout 2024. Essentially a non-socketed version of the desktop "Raphael" MCM, "Dragon Range" features up to two 5 nm "Zen 4" CCDs for up to 16 cores, and a 6 nm cIOD. This processor lacks any form of AI acceleration. In 2025, the processor will be succeeded with "Fire Range," a similar non-socketed, mobile-friendly MCM that's derived from "Granite Ridge," with up to two 4 nm "Zen 5" CCDs for up to 16 cores; and the 6 nm cIOD. What's interesting to note here, is that the quasi-roadmap makes no mention of AI acceleration for "Fire Range," which means "Granite Ridge" could miss out on Ryzen AI acceleration from the processor. Modern discrete GPUs from both NVIDIA and AMD support AI accelerators, so this must have been AMD's consideration to exclude an XDNA-based Ryzen AI accelerator on "Fire Range" and "Granite Ridge."



A segment below "ultimate compute" is our favorite segment, called "elite experiences." This contains "Strix Halo," a processor designed to compete with maxed out Intel "Arrow Lake," and Apple M3 Max. The mega APU utilizes the 4 nm foundry node, and features 16 "Zen 5" CPU cores, alongside a large iGPU based on the RDNA3+ graphics architecture, with a whopping 40 compute units worth 2,560 stream processors. 80 AI accelerators (part of the compute units), and 40 Ray accelerators. The chip also features a next-generation XDNA2 based AI accelerator with a performance of 45-50 TOPS. The Apple M3 Max uses a unified memory architecture over a wide memory bus, it will be interesting to see what kind of memory interface AMD uses to keep the large iGPU, the 50 TOPS AI accelerator, and 16 "Zen 5" cores fed with enough memory bandwidth—dual-channel DDR5 or LPDDR5X don't seem sufficient, so we won't rule out AMD taking the unified memory route like on its semi-custom SoCs for gaming consoles, with solutions such as 256-bit GDDR6.

Below "elite experiences" is "premium compute," which would cover a wide berth of mobile processors in the -U, -P, and -H segments. The processor for this segment is "Strix Point," the logical successor to "Phoenix." This monolithic processor is built on the same 4 nm foundry node, and packs a CPU with 12 "Zen 5" CPU cores, which could be a mix of larger "Zen 5" and smaller "Zen 5c" cores. Both core types offer identical IPC, so they're colloquially written as "Zen 5." Besides this, "Strix Point" features a fairly powerful iGPU based on the RDNA3+ graphics architecture, and the same XDNA2 AI accelerator as "Strix Halo," with up to 50 TOPS performance. AMD is expected to debut "Strix Point" in the second half of 2024.

The lower end of the "premium compute" segment will be catered to by "Hawk Point" in 2024, and "Kraken Point" in 2025. From what we can gather based on rumors, "Hawk Point" is essentially a refresh of the current "Phoenix" monolithic silicon, and is built on the 4 nm node. It packs 8 "Zen 4" CPU cores, an iGPU based on the current RDNA3 graphics architecture, and the first-gen XDNA accelerator with 16 TOPS performance. This chip will hold this segment throughout 2024, and will be succeeded only in 2025, by the "Kraken Point" silicon. "Kraken Point" combines an 8 core CPU based on "Zen 5," with an updated iGPU based on RDNA3+, and the advanced XDNA2 accelerator with up to 50 TOPS performance.

The "mainstream" segment covers notebooks priced under the $500-mark, it's currently being served by the Ryzen 7035 series based on the 6 nm "Rembrand-R" silicon that uses "Zen 3+" CPU cores combined with an RDNA2 iGPU, which is expected to continue on throughout 2024, and be succeeded in 2025 by "Escher," which is very likely the second rehash of "Phoenix," pushed a segment further down. AMD doesn't seem interested in replacing "Mendocino" from its entry segment, which will continue on throughout 2024 and 2025.

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[Denver]

"The mega APU utilizes the 4 nm foundry node, and features 16 "Zen 5" CPU cores, alongside a large iGPU based on the RDNA3+ graphics architecture, with a whopping 40 compute units worth 2,560 stream processors. 80 AI accelerators (part of the compute units), and 40 Ray accelerators

That's more than today's mid-end GPUs have, I wonder what RDNA3+ means.

 

[tabascosauz]

@btarunr Rembrandt-R is 7035. 7030 is Barcelo.

Honestly, for starters, this ridiculous double rebrand garbage needs to die in a fire - which is Barcelo now and Rembrandt next year. Sure, they might need to keep one rebrand generation to help pad out the stack (not like Intel or past AMD didn't also do the same), since every single damn generation they can't serve up availability worth a damn for new gen Ryzen APU, but AMD needs to stop trying to present hardware 2 generations out of date as being worthy of [upper] midrange designs. Mendocino is still fine, no one is under any illusions as to the types of ultra budget laptops it will go into.

 

[AnarchoPrimitiv]

Is there somebody that could explain to me exactly what AI does in a consumer laptop? Not what it may do in the future, but if I bought a laptop right now with the '16 TOPs" mentioned in the article, what would it be doing to benefit me the user?

Also, a 40CU APU is my dream finally come true....I've been wanting an APU with 24+ CUs for years now, and if it will be available on desktop, I'll be 100% buying one (csn you imagine how legendary the SFF gaming systems will be?). I wonder if we'll see integrated HBM (4-8GB of HBM2e/3) with system memory picking up any overflow, or if theyll just make the entire system.memory unified like Apple, personally I think itd be cool to see an HBM solution which allows system memory to still be user upgradeable, but that might be too expensive consideringhow HBM is being devoured by enterprise markets.

I've been saying for a while now that I think the biggest threat AMD presents to Nvidia will not be from AMD's dGPUs, but from their iGPUs and APUs consuming the entry level and lower mid tiers.

 

[Denver]

Is there somebody that could explain to me exactly what AI does in a consumer laptop? Not what it may do in the future, but if I bought a laptop right now with the '16 TOPs" mentioned in the article, what would it be doing to benefit me the user?

Also, a 40CU APU is my dream finally come true....I've been wanting an APU with 24+ CUs for years now, and if it will be available on desktop, I'll be 100% buying one (csn you imagine how legendary the SFF gaming systems will be?). I wonder if we'll see integrated HBM (4-8GB of HBM2e/3) with system memory picking up any overflow, or if theyll just make the entire system.memory unified like Apple, personally I think itd be cool to see an HBM solution which allows system memory to still be user upgradeable, but that might be too expensive consideringhow HBM is being devoured by enterprise markets.

I've been saying for a while now that I think the biggest threat AMD presents to Nvidia will not be from AMD's dGPUs, but from their iGPUs and APUs consuming the entry level and lower mid tiers.

From what I understand, XDNA offers extremely efficient inference acceleration (in performance per watt) compared to GPU. Apps have to be developed to take advantage of this. https://chipsandcheese.com/2023/09/16/hot-chips-2023-amds-phoenix-soc/

The memory configuration will probably be similar to Apple's, 256bit @ LPDDR5T or some variant of that, and maybe 3D cache. At this point HBM3 costs many times more than any other memory technology, so it doesn't make sense

 

[AnotherReader]

From what I understand, XDNA offers extremely efficient inference acceleration (in performance per watt) compared to GPU. Apps have to be developed to take advantage of this. https://chipsandcheese.com/2023/09/16/hot-chips-2023-amds-phoenix-soc/

The memory configuration will probably be similar to Apple's, 256bit @ LPDDR5T or some variant of that, and maybe 3D cache. At this point HBM3 costs many times more than any other memory technology, so it doesn't make sense

I'm very skeptical of this rumour. Apple has a captive audience that they can sell their expensive dies to, but AMD doesn't have that. They also won't have the same economy of scale that Apple enjoys.

 

[Denver]

I'm very skeptical of this rumour. Apple has a captive audience that they can sell their expensive dies to, but AMD doesn't have that. They also won't have the same economy of scale that Apple enjoys.

Don't they have it? I see a wave of handhelds from a dozen brands, all AMD and expensive, selling in the order of millions of units, phoenix-based laptops are also all expensive and demand is always above supply.

 

[AnotherReader]

Don't they have it? I see a wave of handhelds from a dozen brands, all AMD and expensive, selling in the order of millions of units, phoenix-based laptops are also all expensive and demand is always above supply.

Those handhelds are significantly lower cost than laptops with an APU like the Strix Point which would be pretty expensive on its own. LPDDR5 sells at a premium compared to regular DDR5 so that will add more expense to the board. On the flip side, you eliminate a costly discrete GPU and its associated memory. I think the market that Strix Point would target would continue buying laptops equipped with Nvidia dGPUs.

 

[ymdhis]

Strix Halo would be an absolute killer if it ever came to desktop, but even if it did, I imagine they'd screw it up with the APU drivers getting less features than discrete cards. Also memory bandwidth would still be a bottleneck.

 

[AnotherReader]

Strix Halo would be an absolute killer if it ever came to desktop, but even if it did, I imagine they'd screw it up with the APU drivers getting less features than discrete cards. Also memory bandwidth would still be a bottleneck.

If Strix Halo is real, it would need a 256-bit bus to RAM which would mean a new socket for the desktop. Given this, even if Strix point is real, it is very unlikely to come to the desktop.

 

[TumbleGeorge]

Don't they have it? I see a wave of handhelds from a dozen brands, all AMD and expensive, selling in the order of millions of units, phoenix-based laptops are also all expensive and demand is always above supply.

I don't know when TSMC opened up enough capacity to bake millions of working AMD Phoenix units, then cut and build them to ready-to-use and from there through the supply chain to laptop assemblers, dealers, stores, and finally into the hands of the customers. It is natural that the demand for the product is higher than the supply. Apparently the production is negligible.

 

[alwayssts]

That's more than today's mid-end GPUs have, I wonder what RDNA3+ means.

My guess is it just means RDNA3 on N4P. This is because iGPUs are typically one gen behind discrete, and RDNA3 discrete is currently N5, while the next discrete GPU is rumored to be Navi 4 on N4P or N4X. Since it will (probably) be on an improved process compared to RDNA3 but not whatever architecture improvements come to Navi 4, that's probably what "+" means. At the end of the day, it likely just means perf/w improvements.

As for memory bandwidth, AMD is kind of classically known to clock higher-end APUs as-if rated for the GPU being the only thing that needs bandwidth. If you figure something like 7600 @ ~2600mhz needs something like ~430Gbps over a 128-bit bus (G6 + L3), and PS5 448Gbps (256-bit @ 14gbps) it's not crazy to think something like 2560 @ ~2ghz would require something similar; perhaps 32MB L3 and 20gbps GDDR6 on a 128-bit bus, 18gbps if 1800mhz, 24gbps if 2400mhz, but ofc there are other conceivable configs if they add more cache (or double bus width/use high-speed LPDDR5X). Think of this like AMD perhaps going the Qualcomm route (more units but threshold voltage clockspeed) which is much more (twice as) power efficient than ramping clocks. We know from Qualcomm's SnapX that efficient CPU clocks are 3.8-4.3ghz, and it's likely their GPU is 1800mhz, with room to grow to ~2150mhz. If you take W1z's average clock of 7600, that would equal 2560 @ ~2090mhz. IOW, it's (probably) essentially putting a more-efficient 7600 on a CPU, or approx twice what the competition can (currently) muster. They'll probably try to sell it as a DTR for the PS5, as 7600 was very, very, close to that performance, but not quite (at launch). If you take the PS5 GPU speed, which is 2304 @ 2233mhz, and divide that by 2560sp, you get a little over 2ghz. Add in the arch improvements (from VLIW2), which have notoriously been between nil and around only 11-12% (but in some newer instances have grown closer to nVIDIA's unit perf; ~25% better than RDNA2), you can start to see how it could be clocked as low as 1800mhz as well. TLDR; this is probably the smaller more-efficient brother to the PS5pro APU (think a Xbox Series S vs the PS5/XSX APU). It almost sounds like something Sony/MS could have passed on wrt a PS5 refresh (slim) or Xbox Series S upgrade.

This whole lot of units @ low clockspeed thing is conceivably nice to think about; I think we've all wanted to see it for years (efficient performance in a higher-end consumer APU). That said, I'm on to thinking about the next thing, which I think is CPU/GPU clockspeed parity in the mid 4ghz (N3P/X or ~2nm of some sort?). If you think about, it makes sense. WRT CPUs most people don't need something much faster than that; a 120 CB ST score or 4k120fps on W1Z's CPU graphs, and that's the point of the 'compact' cores which should be able to do that at around 4300mhz (just like Qualcomm, which quotes something like 121-122, iirc). If you figure something like a PS6 could be based on a 256-bit/GDDR7 Navi 5 version of Navi31 (with probably improved[doubled or more?] RT), which I think is probably a somewhat safe bet considering not only does it allow AMD to reuse some stuff, but GB202 and GX202 will probably both be twice that count differenciated by process; probably n3e vs n3p, clockspeed/GDDR7 speed(32->36gbps?), and perhaps density (16Gb->32Gb; 2GB->4GB chips?), as well as AMD's propensity for higher clockspeeds, it starts to make sense. I think the goal will be ~50TF (and 60TF for the desktop version), which makes sense both as a marketing thing (100 totally non-achievable Teraflops), realistic improvement over current consoles, and generally how playable settings/performance has been trending wrt scaling. If that were the case, you could imagine something like ~11264/11520 @ 4.4-4.5ghz. Sounds crazy, right? Except it isn't. It's the melding of super-efficient CPU clocks with the maximum potential of a GPU clock, theoretically saving a ton of die space vs the 1/2 (probably Strix Halo; ~2ghz/4ghz cpu) or 2/3 (PS5, probably ps5 pro) ratios we currently see. I have seen literally nobody mention this possibility, but keep it on the burner in the back of your mind if you're a futurist like myself.

So anyway, yeah. That's the new hotness for me. Get back to me when GPUs are using CPU clocks (libraries and voltages? I have no clue on altering the pipeline to that extrent. I need to investigate exactly how that works, or rather could potentially work.)

I'm (mostly) kidding about not caring, I think Strix Halo looks pretty neat if you want a laptop PS5 with slightly better CPU perf, which a lot of people probably do. I'm personally more intrigued by parity in the typical socket configuration, which is probably something like Kracken and will likely bring quite a bit of cost savings/feasability/upgradability, and conceivably bring that level of perf to the handheld market (when on 3nm), but again...One step at a time. I'm glad to see that level of performance appear and/or trickle down to more and more markets.

Edit: (Editted for verbiage clarity. I have no idea why my font switched to strikethrough. It's not intentional.)

 

[Vayra86]

explain to me exactly what AI does in a consumer laptop

It sells laptops. Makes the customer experience go to eleven. Puts the customer even further out of the game and logic transparency. All advantages if you're in the corporate seat!

 

[TumbleGeorge]

The small Phoenix models don't even have AI. And they only have 4 cores in the iGPU. As for displaying some picture on the display

 

[Minus Infinity]

So thanks to MS's AI BS, AMD has to delay the Strix Range and upgrade the AI chip to get the tick of approval. Only the lightly refreshed Hawk Point is coming out as expected.

RDNA3+ is supposed to contain some features from RDNA4, but no leaks have said what that entails or what other updates it might include. It's definitely supposed to be more than RDNA3 on N4P.

At this rate I might end up getting an Apple laptop next year when I finally upgrade my 2016 Dell XPS 15. No Strix until late 2024 or Strix Halo until 2025 sucks. We'll have M4 out by then.

 

[LabRat 891]

If Strix Halo is real, it would need a 256-bit bus to RAM which would mean a new socket for the desktop. Given this, even if Strix point is real, it is very unlikely to come to the desktop.

While, I have some doubts...

Don't forget that APUs used to be (primarily) a separate platform. Maybe an FM5 platform?
AM5 has no 'true' APUs; the graphics included in desktop AM5 are a 'baseline feature'; not marketed like an APU

TBQH though, I'd expect BGA soldered-on ITX and miniPC boards using these APUs (on desktop) but, no socketed option.
(AFAIK signal integrity is simpler w/ solder-on vs. socketed. Also, allows non-standard RAM like DDR5X, etc.)

Regardless, it looks like there's been rumor that some form of Phoenix-derivative APUs will be making it to AM5

AMD APUs are set to make their AM5 debut after support was added to AMD's latest BIOS microcode

Phoenix Ryzing.

www.pcgamer.com

 

[Minus Infinity]

While, I have some doubts...

Don't forget that APUs used to be (primarily) a separate platform. Maybe an FM5 platform?
AM5 has no 'true' APUs; the graphics included in desktop AM5 are a 'baseline feature'; not marketed like an APU

TBQH though, I'd expect BGA soldered-on ITX and miniPC boards using these APUs (on desktop) but, no socketed option.
(AFAIK signal integrity is simpler w/ solder-on vs. socketed. Also, allows non-standard RAM like DDR5X, etc.)

Regardless, it looks like there's been rumor that some form of Phoenix-derivative APUs will be making it to AM5

AMD APUs are set to make their AM5 debut after support was added to AMD's latest BIOS microcode

Phoenix Ryzing.

www.pcgamer.com

MlisD put up a slide based on AMD insiders saying Halo was indeed getting a 256 bit bus. This is a serious APU to obviate the need for a discrete GPU in a gaming laptop. It could kill everything under a 7700XT.