Intel's Desktop and Mobile "Arrow Lake" Chips Feature Different Versions of Xe-LPG

[btarunr]

Toward the end of 2024, Intel will update its client processor product stack with the introduction of the new "Arrow Lake" microarchitecture targeting both the desktop and mobile segments. On the desktop side of things, this will herald the new Socket LGA1851 with more SoC connectivity being shifted to the processor; and on the mobile side of things, there will be a much-needed increase in CPU core counts form the current 6P+8E+2LP. This low maximum core-count for "Meteor Lake" is the reason why Intel couldn't debut it on the desktop platform, and couldn't use it to power enthusiast HX-segment mobile processors, either—it had to tap into "Raptor Lake Refresh," and use the older 14th Gen Core nomenclature one last time.

All hopes are now pinned on "Arrow Lake," which could make up Intel's second Core Ultra mobile lineup; its first desktop Core Ultra, and possibly push "Meteor Lake" to the non-Ultra tier. "Arrow Lake" carries forward the Xe-LPG graphics architecture for the iGPU that Intel debuted with "Meteor Lake," but there's a key difference between the desktop- and mobile "Arrow Lake" chips concerning this iGPU, and it has not just to do with the Xe core counts. It turns out, that while the desktop "Arrow Lake-S" processor comes with an iGPU based on the Xe-LPG graphics architecture; the mobile "Arrow Lake" chips spanning the U-, P-, and H-segments will use a newer version of this architecture, called the Xe-LPG+.



Intel tends to give its desktop S-segment and enthusiast mobile HX-segment processors their smallest tiers of iGPUs to accommodate the relatively higher CPU core counts. In comparison, it tends to give its mobile U, P, and H-segments better endowed iGPUs with higher shader counts, with the guiding principle being that these notebooks tend to lack discrete graphics, and so you'd want to give users the best possible graphics from the processor.

It's likely that Intel is extending this principle even to the graphics architectures behind its future iGPUs. At this point, we don't exactly know what constitutes the "+" in Xe-LPG+. One line of speculation holds that Intel might be updating the media accelerators and display engines of the iGPU while retaining the Xe-LPG ISA for the Xe Cores. But it turns out that Intel has done the opposite—a Coelacanth's Dream article says that Xe-LPG+ is an update to the ISA side of things, rather than to ancillaries such as media or display.

Apparently, LPG+ gets support for DPAS (dot product accumulate systolic), something that's already available on the Xe-HPG, but which the original iteration of Xe-LPG lacks. DPAS enables FP16, BF16, and INT4 multiplication with 16 or 32 bits accumulate. Xe-LPG is an "in between" to the Xe-LP architecture powering older generation Intel iGPUs; and the Xe-HPG powering its Arc discrete GPUs. Xe-LPG features the full DirectX 12 Ultimate machinery from the Xe-HPG, but lacks its XMX AI acceleration engine. XeSS falls back to a DP4a codepath on Xe-LPG.

Intel is expected to debut "Arrow Lake" in Q4-2024.

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[AnarchoPrimitiv]

Does anybody else find it difficult to keep all the different Intel IP sorted in your head? They have several different generations and architectures in distribution simultaneously, several different CPU and GPU architectures architectures on the same chip, different forms of those architectures and none of it has a simple, sequential naming scheme, i.e. Zen 1. ZEN 2, Zen 3 (I know they also go by Milam. Genoa, etc, but they also go by Zen 3, Zen4 and AMD refers to those names in their literature which helps keeping it sorted.

You add in the Xeon line and it gets even more confused....I'm one of those people that absolutely HAS to have a full and complete grasp on a topic that I regularly encounter (i.e. daily), so it is annoying....maybe I'll make an interactive spreadsheet, haha

 

[Onasi]

Does anybody else find it difficult to keep all the different Intel IP sorted in your head? They have several different generations and architectures in distribution simultaneously, several different CPU and GPU architectures architectures on the same chip, different forms of those architectures and none of it has a simple, sequential naming scheme, i.e. Zen 1. ZEN 2, Zen 3 (I know they also go by Milam. Genoa, etc, but they also go by Zen 3, Zen4 and AMD refers to those names in their literature which helps keeping it sorted.

You add in the Xeon line and it gets even more confused....I'm one of those people that absolutely HAS to have a full and complete grasp on a topic that I regularly encounter (i.e. daily), so it is annoying....maybe I'll make an interactive spreadsheet, haha

They do have an atrocious naming scheme, true. I think my main point of annoyance is that they, for whatever godforsaken reason, decided to stick with “X Lake” since Skylake. At least before you had different names and the change that kept part of old name was denoting a die shrink. So Sandy Bridge - Ivy Bridge, Haswell - Broadwell. With the “long stagnation” the whole Skylake - Kaby Lake - Coffee Lake at least made sense, that was all on one arch. But since Rocket Lake it turned into a complete mess.

 

[wNotyarD]

They do have an atrocious naming scheme, true. I think my main point of annoyance is that they, for whatever godforsaken reason, decided to stick with “X Lake” since Skylake. At least before you had different names and the change that kept part of old name was denoting a die shrink. So Sandy Bridge - Ivy Bridge, Haswell - Broadwell. With the “long stagnation” the whole Skylake - Kaby Lake - Coffee Lake at least made sense, that was all on one arch. But since Rocket Lake it turned into a complete mess.

Intel can't even keep regularity over a single generation. Why the heck were there alder lakes among the raptors in the 13th gen? Why not all of them being RPL (which some of the models also were, although gimped to ADL levels)?

 

[Scrizz]

Interesting how the first 3 posts that also happen to be complaining about Intel are also AMD users.

Xe-LPG features the full DirectX 12 Ultimate machinery from the Xe-HPG, but lacks its XMX AI acceleration engine. XeSS falls back to a DP4a codepath on Xe-LPG.

Interesting, these are more things to look out for when purchasing a portable device if it's something the target audience requires.

 

[wNotyarD]

Interesting how the first 3 posts that also happen to be complaining about Intel are also AMD users.

FWIW, I'm also an Intel user. My laptop runs an i5-9400.