InnoGrit Starts Mass Producing YRS820 PCIe 5.0 Controller, Based on RISC-V Architecture

[T0@st]

InnoGrit's low-wattage 12 nanometer IG5666 controller popped up on the T-FORCE GE PRO PCIe 5.0 SSD series earlier in the year, but attention has turned to another consumer-grade design. Parent company—Yingren Technology—is not well known outside of China, although its InnoGrit brand has started to make inroads within Western markets. The enterprise-level YRS900 PCIe 5.0 SSD controller was announced last September—this open-source RISC-V-based solution was designed/engineered to "align with U.S. export restrictions." According to cnBeta and MyDrivers reports, a new YRS820 controller has successfully reached the mass production phase. This is a PCIe 5.0 consumer-grade controller, likely derived from its big sibling (YRS900).

According to InnoGrit presentation material, their new model is based on: "RISC-V instruction architecture, adopts a 4-channel PCIe 5.0 interface, is equipped with 8 NAND flash memory channels, supports NVMe 2.0 protocol, has an interface transmission rate of 2667MT/s, can be paired with 3D TLC/QLC, and supports a maximum capacity of up to 8 TB." Company representatives stated that the YRS820 controller is destined to be fitted on high-end consumer parts—the AI PC market segment is a key goal, since the YRS820 is able to: "accelerate data processing for specific applications and have high stability, consistency and security." cnBeta highlighted some anticipated performance figures: "YRS820 achieves sequential read 14 GB/s, sequential write 12 GB/s, random read and random write up to 2000K IOPs and 1500K IOPs respectively." InnoGrit did not reveal a release timetable, since their latest consumer-grade controller is going through a validation process. The company is currently collaborating with domestic NAND flash memory and DRAM manufacturers, as well as other industry bodies.



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[Chaitanya]

Would be curious to see thermal performance of this controller.

 

[AnarchoPrimitiv]

Anyone here knowledgeable on SSD controllers and NAND? If so, what is holding back progress on low queue depth random reads and write? Is it an inherent shortcoming of NAND (is that why Intel developed 3DXpoint/optane?) and we've basically hit the wall?

 

[Onasi]

Is it an inherent shortcoming of NAND (is that why Intel developed 3DXpoint/optane?) and we've basically hit the wall?

Yes, but the wall isn’t unyielding just yet. From my understanding, a lot of Random Low Queue speeds are reliant on the speed of the NAND bus itself. We’ve been stuck on 1200 and 1600MT/s for a while and the second was rare. I understand that new controllers and NAND scale up to 2400 (or 2667, as pointed in the article for this controller), so that should be an improvement. But overall, yeah, NAND is just fundamentally limited here and is unlikely to reach Optane levels.

 

[TumbleGeorge]

Yes, but the wall isn’t unyielding just yet. From my understanding, a lot of Random Low Queue speeds are reliant on the speed of the NAND bus itself. We’ve been stuck on 1200 and 1600MT/s for a while and the second was rare. I understand that new controllers and NAND scale up to 2400 (or 2667, as pointed in the article for this controller), so that should be an improvement. But overall, yeah, NAND is just fundamentally limited here and is unlikely to reach Optane levels.

Not enough for this

 

[bonehead123]

14/12GB/s, 8TB, & 4 channels = major y.A.w.N....

 

[AnotherReader]

Anyone here knowledgeable on SSD controllers and NAND? If so, what is holding back progress on low queue depth random reads and write? Is it an inherent shortcoming of NAND (is that why Intel developed 3DXpoint/optane?) and we've basically hit the wall?

It's an inherent shortcoming of NAND just like DRAM's latency hasn't decreased in decades though in DRAM's case, it's related to the interface as well. Lower latency DRAM is possible, but it would cost area and would require changes to the way DRAM is accessed.

 

[Wirko]

14/12GB/s, 8TB, & 4 channels = major y.A.w.N....

They had an 8-channel prototype too but it converted everything solid-state around it into a stinky puddle of silicon along with some smoke...

Anyone here knowledgeable on SSD controllers and NAND? If so, what is holding back progress on low queue depth random reads and write? Is it an inherent shortcoming of NAND (is that why Intel developed 3DXpoint/optane?) and we've basically hit the wall?

By now it's become very apparent there's a wall, and it won't retreat by more than an inch every year. I'd also ask who is holding back progress on high queue depth random reads and writes? Developers of applications, games and operating systems should stop waiting for the ideal SSD and instead learn a thing or two about multi-threaded access to storage when a lot of random reads is needed. Why didn't they when we had hard disks everywhere? Yes, multi-threaded designs and implementations are hard to do, that's clear. But they would overcome the said deficiency of NAND SSDs to a very large extent, I'm sure of that.

Random writes are less of a problem, they are always several times faster than reads (because they can be cached) and generally there are fewer writes than reads.

Also, where has Samsung Z-NAND gone? It was many times more expensive than any other NAND-based enterprise SSD but its latency was incredibly low too.