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Based on information shared by a Baidu user called Piglin, we now have access to an annotated die image of Qualcomm's Snapdragon X Elite processor. This analysis provides insights into the architecture of this new system-on-chip, highlighting several key features, including large CPU cores, a GPU, and a complex cache system. The report indicates that the Snapdragon X Elite die measures 169.6 mm² and is fabricated using TSMC's N4P 4 nm-class process. A notable aspect of the die shot is the considerable size of the "Phoenix" Oryon CPU cores, each reportedly measuring around 2.55 mm². These cores are significantly larger than typical Arm CPU cores, which is logical given their original purpose for the data center. The SoC features a total of 12 CPU cores in an 8+4 configuration.
The GPU, called Adreno X1, takes up 24.3 mm² of die area, roughly half the size of the CPU and CPU cache section. Despite its compact size, Qualcomm claims the GPU delivers approximately 4.6 FP32 TFLOPS of raw performance. Interestingly, the 45 TOPS NPU, which Qualcomm has emphasized as a key feature, is not clearly visible in the image. Another significant aspect is the extensive cache system. The three quad-core CPU clusters each occupy 16.1 mm², and feature 12 MB of high-speed L2 cache. Additionally, 6 MB is dedicated to system-level cache on 5.09 mm² area, along with a separate GPU cache. In total, the CPU boasts 54 MB of caches distributed across the die. The report also compares the Snapdragon X Elite to Apple's M4 SoC. However, it's worth noting that this isn't an exact comparison, as Apple utilizes an N3E 3 nm-class node for its chip. Below is the annotated die of Snapdragon X Elite and Apple's M4 from the original report.
View at TechPowerUp Main Site | Source
The GPU, called Adreno X1, takes up 24.3 mm² of die area, roughly half the size of the CPU and CPU cache section. Despite its compact size, Qualcomm claims the GPU delivers approximately 4.6 FP32 TFLOPS of raw performance. Interestingly, the 45 TOPS NPU, which Qualcomm has emphasized as a key feature, is not clearly visible in the image. Another significant aspect is the extensive cache system. The three quad-core CPU clusters each occupy 16.1 mm², and feature 12 MB of high-speed L2 cache. Additionally, 6 MB is dedicated to system-level cache on 5.09 mm² area, along with a separate GPU cache. In total, the CPU boasts 54 MB of caches distributed across the die. The report also compares the Snapdragon X Elite to Apple's M4 SoC. However, it's worth noting that this isn't an exact comparison, as Apple utilizes an N3E 3 nm-class node for its chip. Below is the annotated die of Snapdragon X Elite and Apple's M4 from the original report.
View at TechPowerUp Main Site | Source
