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French website CanardPlus published slides from Intel covering its future plans and product evolution model called the "tick tock" model in which an architecture is released every time frame and improvised following it, where the fabrication process is shrunk and some features added. Les nouveaux CPU suivront donc le schéma de développement « The new CPU release will follow the pattern of development "Tick-Tock", ie a new architecture every two years (Tock), followed by a die shrink (Tick) to increase the fine print.
Nehalem processors are made of logic-blocks (cores, without some machinery) blocks provide modularity and products can be engineered on the quality and quantity of these blocks. An insight to the architecture is provided.
Successors to Nehalem
Sandybridge: Planned for 2010, this will succeed current Nehalem chips, the base architecture on the whole is similar to that of Nehalem, codenamed Gesher. It will have 8 cores, 16 MB of L3 cache and a new instruction set called Advanced Vector Extensions.
Its entry is expected to be as significant as that of SSE in 1999 for the Pentium III for the computing world, mainly because:
Haswell: Successor to Sandybridge, entry to the 22nm fabrication process, something truly revolutionary architecture-wise, 8-cores and the introduction of FMA (Fused Multiply-Add), which allows for simultaneous operation of multiplication and addition via the same instruction.
View at TechPowerUp Main Site
Nehalem processors are made of logic-blocks (cores, without some machinery) blocks provide modularity and products can be engineered on the quality and quantity of these blocks. An insight to the architecture is provided.
Successors to Nehalem
Sandybridge: Planned for 2010, this will succeed current Nehalem chips, the base architecture on the whole is similar to that of Nehalem, codenamed Gesher. It will have 8 cores, 16 MB of L3 cache and a new instruction set called Advanced Vector Extensions.
Its entry is expected to be as significant as that of SSE in 1999 for the Pentium III for the computing world, mainly because:
- The extension of the current SSE registers 128 to 256 bits, while remaining compatible with 128-bit SSE instructions.
- The rearrangement advanced data: a single operation can simultaneously handle 8 data bits 32
Haswell: Successor to Sandybridge, entry to the 22nm fabrication process, something truly revolutionary architecture-wise, 8-cores and the introduction of FMA (Fused Multiply-Add), which allows for simultaneous operation of multiplication and addition via the same instruction.
View at TechPowerUp Main Site
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