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AMD Demonstrates World's First Native Quad-Core X86 Server Processor

malware

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AMD today demonstrated the industry's first native quad-core x86 server processor, achieving four x86 processing cores on a single die of silicon. At the annual AMD Industry Analyst Forum, a server powered by four upcoming Quad-Core AMD Opteron processors (codenamed Barcelona), manufactured on 65nm silicon-on-insulator process technology, was shown utilizing all 16 cores. By delivering a consistent thermal envelope while adding two more processing cores, along with micro-architectural enhancements, AMD expects to significantly advance the performance-per-watt capabilities of AMD Opteron processors.


"AMD is guided by an overarching strategy to reduce datacenter complexity and to deliver performance increases without forcing customers to endure disruptive platform transitions," said Randy Allen, corporate vice president, Server and Workstation Division, AMD. "We discussed quad-core requirements with our customers and their end users, and determined that, as we did with the introduction of dual-core x86 processors in 2005, only a native quad-core x86 server processor would excel in the broad set of dimensions that matter to our customers. With the introduction of native quad-core x86 processors in the second quarter of 2007, AMD plans to again deliver exceptional technology based on the same customer-centric design principles that steered the development of our award-winning AMD dual-core server, workstation, desktop and mobile processors."

Upgradeability from dual- to quad-core processors is expected to be as straightforward as it was from single- to dual-core with AMD, with unchanged thermal and electrical envelopes. The demonstration today was an example of this. The reference server platform was seamlessly upgraded to quad-core by replacing the server's existing DDR2-based AMD Opteron processors with the new Quad-Core AMD Opteron processors and updating the BIOS.

The upcoming AMD Opteron processors are based on AMD's innovative Direct Connect Architecture, which reduces bottlenecks found in legacy front-side bus x86architectures and includes AMD's proven Integrated Memory Controller. These processors are designed to enhance I/O throughput and CPU-to-CPU communication, and to deliver increased performance with low power consumption and low memory latency.

As the next innovation on AMD's consistent roadmap, native Quad-Core AMD Opteron processors continue AMD's tradition of reducing the total cost of ownership for the enterprise. Current DDR2-based AMD Opteron processor-based platforms should seamlessly upgrade to native quad-core AMD processors without compromising performance, power or heat - helping to meet the changing and escalating demands of the enterprise customer.

Native Quad-Core AMD Opteron processors are also planned to feature enhanced AMD Virtualization (AMD-V) technology with nested page tables, delivering world-class performance and advanced leadership in x86 virtualization, as well as energy-efficient DDR2 memory support.

"IT managers require platforms that can help them run their mission-critical business applications reliably and with less infrastructure, power and space," said Vernon Turner, group vice president and general manager of IDC's Enterprise Computing. "Because of AMD's approach to design its multi-core processors from the ground up, AMD has set a new standard for multi-core computing in the enterprise."

Demonstration Platform
AMD quad-core technology was demonstrated on a reference server platform running 64-bit Windows Server 2003. The four-processor server was powered by native Quad-Core AMD Opteron 8000 Series processors.

Online Demonstration
To access a videotaped discussion and demonstration of this technology, go to http://www.amd.com/quadcoredemo.

Availability
AMD expects to begin shipping native Quad-Core AMD Opteron processors that incorporate four processor cores on a single die of silicon to customers in mid-2007. The first AMD quad-core processor line-up introduced will be for the two- to eight-socket server and workstation market.

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Alec§taar

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This is going to rock in industrial environs for servers & scientific applications!

(On apps? It'll help, provided they're either explicity SMP ready via API work detecting CPU cores available + API calls like Win32's SetThreadAffinity etc. & yes, w/ std. multithreaded designed apps, so the OS process scheduler components sends threads to the least saturated CPU cores 2-N present & the apps have 2-N threads, doing tasks independently, even if coarse grained multithreading & more on fine grained multiple thread designs).

Databases & such, as well as servicing multiple user's requests should see gains.

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