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Micron Technology has taped out its 4th generation 3D NAND flash memory with 128 layers. This paves the way for mass production and product implementations in 2020. The 4th gen 3D NAND by Micron continues to use a CMOS-under-array design, but with Replacement Gate (RG) Technology instead of Floating Gate, which Micron and the erstwhile IMFlash Technology had been using for years. Micron is currently mass-producing 96-layer 3D NAND flash, and TLC remains the prominent data-storage physical layer despite the advent of QLC (4 bits per cell).
Micron comments that this 4th gen 128-layer 3D NAND will be a stopgap restricted to a select few applications, and may not see the kind of adoption as its current 96-layer chips. The company appears to be more focused on its evolution, possibly the 5th generation 3D NAND, which are expected to bring tangible cost-per-bit gains for the company, as it transitions to a newer silicon fabrication node, and implements even newer technologies besides RG. "We achieved our first yielding dies using replacement gate or "RG" for short. This milestone further reduces the risk for our RG transition. As a reminder, our first RG node will be 128 layers and will be used for a select set of products. We don't expect RG to deliver meaningful cost reductions until FY2021 when our second-generation RG node is broadly deployed. Consequently, we are expecting minimal cost reductions in NAND in FY2020. Our RG production deployment approach will optimize the ROI of our NAND capital investments," said Sanjay Mehrotra, CEO and president of Micron.
View at TechPowerUp Main Site
Micron comments that this 4th gen 128-layer 3D NAND will be a stopgap restricted to a select few applications, and may not see the kind of adoption as its current 96-layer chips. The company appears to be more focused on its evolution, possibly the 5th generation 3D NAND, which are expected to bring tangible cost-per-bit gains for the company, as it transitions to a newer silicon fabrication node, and implements even newer technologies besides RG. "We achieved our first yielding dies using replacement gate or "RG" for short. This milestone further reduces the risk for our RG transition. As a reminder, our first RG node will be 128 layers and will be used for a select set of products. We don't expect RG to deliver meaningful cost reductions until FY2021 when our second-generation RG node is broadly deployed. Consequently, we are expecting minimal cost reductions in NAND in FY2020. Our RG production deployment approach will optimize the ROI of our NAND capital investments," said Sanjay Mehrotra, CEO and president of Micron.
View at TechPowerUp Main Site
