malware
New Member
- Joined
- Nov 7, 2004
- Messages
- 5,422 (0.74/day)
- Location
- Bulgaria
| Processor | Intel Core 2 Quad Q6600 G0 VID: 1.2125 |
|---|---|
| Motherboard | GIGABYTE GA-P35-DS3P rev.2.0 |
| Cooling | Thermalright Ultra-120 eXtreme + Noctua NF-S12 Fan |
| Memory | 4x1 GB PQI DDR2 PC2-6400 |
| Video Card(s) | Colorful iGame Radeon HD 4890 1 GB GDDR5 |
| Storage | 2x 500 GB Seagate Barracuda 7200.11 32 MB RAID0 |
| Display(s) | BenQ G2400W 24-inch WideScreen LCD |
| Case | Cooler Master COSMOS RC-1000 (sold), Cooler Master HAF-932 (delivered) |
| Audio Device(s) | Creative X-Fi XtremeMusic + Logitech Z-5500 Digital THX |
| Power Supply | Chieftec CFT-1000G-DF 1kW |
| Software | Laptop: Lenovo 3000 N200 C2DT2310/3GB/120GB/GF7300/15.4"/Razer |
Rambus Inc. plans to announce this Wednesday a new memory signaling technology initiative targeted at delivering a Terabyte-per-second of memory bandwidth, which the company touts as a solution for next-generation multi-core, game and graphics applications. Rather than simply increasing the clock speed of memory to achieve higher output, Rambus looks to boost bandwidth with a 32X data rate. Just as DDR memory technologies doubles transfer on a single, full clock signal cycle, Rambus' proposed technology is able to data at 32 times the reference clock frequency. With 32X technology, the memory company is targeting a bandwidth of 16Gbps per DQ link with memory running at 500MHz. In contrast, today's DDR3 at 500MHz achieves a bandwidth of 1Gbps. The terabyte bandwidth memory method is slated for year 2011. Rambus has also recently received early silicon capable of demonstrating its technology. The early test rig uses emulated DRAM chips, connected to a Rambus memory controller at a 32X data rate capable of 64Gbps. Rambus will show it this Wednesday at the Rambus Developer Forum in Tokyo, Japan.
View at TechPowerUp Main Site
View at TechPowerUp Main Site
