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AMD Introduces Ryzen 5 and Ryzen 3 Mobile Processors with "Zen 4c" Cores

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AMD today launched its first client processors that feature the compact "Zen 4c" CPU cores, with the Ryzen 5 7545U and Ryzen 3 7440U mobile processors for thin-and-light notebooks. The "Zen 4c" CPU core is a compacted version of the "Zen 4" core without the subtraction of any hardware components, but rather a high density arrangement of them on the 4 nm silicon. A "Zen 4c" core is around 35% smaller in area on the die than a regular "Zen 4" core. Since none of its components is removed, the core features an identical IPC (single thread performance) to "Zen 4," as well as an identical ISA (instruction set). "Zen 4c" also supports SMT or 2 threads per core. The trade-off here is that "Zen 4c" cores are generally clocked lower than "Zen 4" cores, as they can operate at lower core voltages. This doesn't, however, make the "Zen 4c" comparable to an E-core by Intel's definition, these cores are still part of the same CPU clock speed band as the "Zen 4" cores, at least in the processors that's being launched today.

The Ryzen 5 7545U and Ryzen 3 7440U mobile processors formally debut the new 4 nm "Phoenix 2" monolithic silicon. This chip is AMD's first hybrid processor, in that it has a mixture of two regular "Zen 4" cores, and four compact "Zen 4c" cores. The six cores share an impressive 16 MB of L3 cache. All six cores feature 1 MB of dedicated L2 cache. There is no complex hardware-based scheduler involved, but a software based solution that's deployed by AMD's Chipset Software, which tells the Windows scheduler to see the "Zen 4" cores as UEFI CPPC "preferred cores," and prioritize traffic to them, as they can hold on to higher boost frequency bins. The "Phoenix 2" silicon inherits much of the on-die power-management feature-set from the "Phoenix" and "Rembrandt" chips, and so are capable of a high degree of power savings with underutilized CPU cores and iGPU compute units.



The iGPU of "Phoenix 2" is based on the latest RDNA3 graphics architecture, however it is not exactly built for gaming, it has just enough muscle for a modern Windows 11 experience with animated UI, complex web-pages, and streaming video based on the latest AV1 and HEVC formats. The iGPU packs 4 compute units that add up to 256 stream processors. There are also AI accelerators that are intrinsic to the RDNA3 compute units. A big change with "Phoenix 2" is that it lacks the 16 TOPS XDNA accelerator, and hence both the processor models being launched today lack Ryzen AI.

As for the chips themselves, the Ryzen 5 7545U maxes out the "Phoenix 2" silicon, enabling all two "Zen 4" and all four "Zen 4c" cores; along with 16 MB of L3 cache, 22 MB of "total cache" (L2+L3), a CPU clock speed of 3.20 GHz base, and 4.90 GHz boost; and a TDP band of 15 W to 30 W. The Ryzen 3 7440U, on the other hand, is a quad-core chip, enabling both "Zen 4" cores, and two out of the four available "Zen 4c" cores. The shared L3 cache is reduced to 8 MB, and hence the total cache is down to 12 MB. The CPU is clocked at 3.00 GHz, with 4.70 GHz maximum boost. The TDP band remains 15 W to 30 W. Both models max out the iGPU with its available 4 compute units; which has the branding Radeon 740M.



Notebooks based on the Ryzen 5 7545U and Ryzen 3 7440U should begin rolling out now, the two chips mostly cater to entry/mainstream variants of existing thin-and-lights, including some notebooks with mainstream thickness.

The complete press-deck follows.



View at TechPowerUp Main Site
 
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AMD is finally putting the nail in the coffin of those calling Zen 4c e-cores with this slide:

1698930595810.png

Zen 4 and Zen 4c are BOTH high performance cores and are BOTH designed for high efficiency.
 
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It would be valuable to have information on the Zen4c's maximum clockrate before it exceeds the optimal efficiency threshold. :)
 
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AMD is finally putting the nail in the coffin of those calling Zen 4c e-cores with this slide:

View attachment 319960
Zen 4 and Zen 4c are BOTH high performance cores and are BOTH designed for high efficiency.
The slide is highly questionable or just flat out wrong. Half of those are irrelevant (all cores can have smt, who cares?) or just plainly lying. E cores don't improve gaming? Really? lol...
 
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AMD is finally putting the nail in the coffin of those calling Zen 4c e-cores with this slide:

View attachment 319960
Zen 4 and Zen 4c are BOTH high performance cores and are BOTH designed for high efficiency.
Zen 4c are no E-cores becuase they are not E-cores, from both sides of the argument. They are a slightly more efficient Zen 4 core at particular frequency and power range, as described in the slides.
 
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The slide is highly questionable or just flat out wrong. Half of those are irrelevant (all cores can have smt, who cares?) or just plainly lying. E cores don't improve gaming? Really? lol...

uhh yeah, there are games where having the e-cores off actually improves performance....soo yeah.
 
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AMD is finally putting the nail in the coffin of those calling Zen 4c e-cores with this slide:

View attachment 319960
Zen 4 and Zen 4c are BOTH high performance cores and are BOTH designed for high efficiency.
I'm not sure what people mean when they say Intel's P and E cores have different instruction sets; Intel did disable some instructions to get Golden Cove and Gracemont to work together, but the end result is they have the same instructions. And future generations will probably be designed with the same instructions.

Also E cores are die-area efficient. In terms of power efficiency Intel thinks of their cores as AMD does, they're all efficient.
 
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AMD is finally putting the nail in the coffin of those calling Zen 4c e-cores with this slide:

View attachment 319960
Zen 4 and Zen 4c are BOTH high performance cores and are BOTH designed for high efficiency.

So what's the point of 4c, why not just use a non c core
 
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Zen 4C has essentially the same hardware and performance characteristics as a normal Zen 4, it only lacks a bit in its max. clock.
How does it do that with 35% less silicon?
 

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Zen 4C has essentially the same hardware and performance characteristics as a normal Zen 4, it only lacks a bit in its max. clock.
How does it do that with 35% less silicon?
Without going into a technical deep dive, the transistors are more densely packed. This means that A. the maximum operating voltage is reduced, so maximum clockspeed is lower, and B. Higher clocks can be acheived at extremely low power budgets.

Basically they traded clockspeed headroom for less die space and greater efficiency at the low end of TDP.
 
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Zen 4C has essentially the same hardware and performance characteristics as a normal Zen 4, it only lacks a bit in its max. clock.
How does it do that with 35% less silicon?

You can read a detailed explanation in the article below. There is a significant loss of maximum clock rate, not a big problem on laptops and servers, as the clockrate in both scenarios is low in nature.

Zen 4c: AMD’s Response to Hyperscale ARM & Intel Atom (semianalysis.com)

"16 Zen 4c cores are barely larger than 8 Zen 4 cores. At ISSCC 2023, AMD disclosed Zen 4’s CCD to be 66.3mm². This is the design area without die seal and scribe lines at the edges. Zen 4c’s CCD design area is just 72.7mm², not even 10% bigger!"




1698932065952.png
 
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It would be valuable to have information on the Zen4c's maximum clockrate before it exceeds the optimal efficiency threshold. :)
The picture isn't one-sided. One of the slides indicates that Zen 4c clocks better than Zen 4 at low TDP: the cross-over point appears to be 17.5 W.

1698932535404.png
 
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considering we see the issue creep up on Unreal 4 and 5 based games...probably a lot more then 2.
Ive no idea what you are talking about tbh, most games ive tested work better with ecores on but w/e
 

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The picture isn't one-sided. One of the slides indicates that Zen 4c clocks better than Zen 4 at low TDP: the cross-over point appears to be 17.5 W.
Indeed. In some server scenarios, where the TDP per Core is even worse than laptops, Zen 4c clocks faster than Zen 4.

IIRC, it does have slightly limited L3 Cache bandwidth, and half the l3/core of desktop Zen 4 - but the same as Laptop Zen 4.
 
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The picture isn't one-sided. One of the slides indicates that Zen 4c clocks better than Zen 4 at low TDP: the cross-over point appears to be 17.5 W.

View attachment 319970
It's difficult to draw any conclusions from this slide, for starters the CPU in question has 2 normal zen4 cores. In my opinion, the fact that the zen4c are limited to a considerably lower clock rate may have given room for regular cores to increase their clock speed at the same TDP.

The ideal would be Zen4c vs Zen4.
 
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it's still an answer to E cores even if it is not done the same way.
 
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It's difficult to draw any conclusions from this slide, for starters the CPU in question has 2 normal zen4 cores. In my opinion, the fact that the zen4c are limited to a considerably lower clock rate may have given room for regular cores to increase their clock speed at the same TDP.

The ideal would be Zen4c vs Zen4.
Yes, the ideal would be Zen 4c vs Zen 4. However, the fact that there's a point where the 6 Zen 4 cores exceed the efficiency of this part suggests that it's the Zen 4c cores that are clocking higher than Zen 4 cores at low TDP. Reviews have also noted the clock stability of Zen 4c compared to Zen 4 and Golden Cove at low power draws per core under sustained load.

That is every core, 3.1GHz running 256 threads of stress-ng, fully heat soaked, but the clocks were constant even at high CPU temps. In the world of cloud-native where there is a focus on lowering performance variations, this image shows that every core can provide the same maximum clock speed at the same time. This is not common for EPYC and Xeon processors.

it's still an answer to E cores even if it is not done the same way.
No, Zen 4c is an answer to cloud workloads where most customers only get part of a processor. In particular, this is aimed at AWS's Graviton and Ampere's Altra. In the course of this, they figured out that it makes for a better E core than Gracemont and chose to use it for lower end laptops.
 
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Ive no idea what you are talking about tbh, most games ive tested work better with ecores on but w/e

I don't even bother turning mine off, don't see the point.

The way i see it, intel had a cpu with high and low power cores for desktops/laptops or whatever, this is AMD's answer to that, disagree or not.
 
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This mix of Zen4 and 4c cores is made only for power efficiency & cost/chiplet purposes, not for performance. So, for light workstations and specific server workloads that design might become a must. Needs proper reviews to show its pros and cons though.
 
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ZenC is a dense Zen core. ZenC is a derivative of the Zen and still Zen architecture. You can call it an E core if you want, because that is what it is being. More efficient. Intel's E core is a completely different processor all together. No different then pairing a Sandy Bridge "P" core with an Atom Cedarview "E" core. Gracemont is not a derivative of Golden Cove. So in that sense, they are not the same. If Intel was doing something similar to AMD, their Gracemonte E cores would be a dense Golden Cove architecture, but it is not.
 
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Ive no idea what you are talking about tbh, most games ive tested work better with ecores on but w/e
Clearly obvious you have no idea what you are talking about, yet astroturfing for Intel without any knowledge is actually bad for Intel lol
 

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Zen 4C has essentially the same hardware and performance characteristics as a normal Zen 4, it only lacks a bit in its max. clock.
How does it do that with 35% less silicon?
It is not a hard concept.

Zen 4c are fabbed on TSMC 4nm which is a density optimized 5nm. Zen 4c cores also have half the L3 cache the normal zen4 cores have. Cache takes up a lot of area.

EDIT: Theres conflicting articles going around, some say they are on 4nm. Some say its still 5nm. Either way, majority of that area improvement is reduction in cache. Clock freq dont impact area much, so the reduction in clk freq is not really contributing to area reductions.

The library AMD is using is also different with density being priority so everything in that library can be packed closer, routing layers routed closer together via rules, etc.
 
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