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AMD Ryzen 9 9950X Supports PBO After All

btarunr

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AMD's upcoming flagship desktop processor, the Ryzen 9 9950X, supports Precision Boost Overdrive (PBO) overclocking. In the comments section of our Zen 5 Technical Deep Dive article, a keen-eyed user noticed a footnote in one of the slides that reads that PBO is supported on Ryzen 9000 series desktop processor with the parenthesis "excluding the 9950." Add to this, the company's presentation slide for PBO on Ryzen 9000 series only highlights performance gains for the Ryzen 9 9900X, the Ryzen 7 9700X, and the Ryzen 5 9600X, but not the 9950X. We reached out to AMD seeking a clarification on this.

AMD got back to us and confirmed that the Ryzen 9 9950X does indeed support PBO overclocking: "Confirmed that PBO is supported with 9950X", just like the 9900X, 9700X, and the 9600X, and that there is an "Error in the footnotes." It would be highly unusual for AMD to disable PBO on a specific SKU, especially considering that all non-APU Ryzen processors in the past have supported PBO, not just some special overclocking SKUs, like the "K" models on Intel.



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Sounds like a weird mistake to make.. It's not like they confused the top model with some budget chips of similar naming..
 
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Meh, speak to the graphics department,.......heads will roll.
 
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Come on, a firm like the AMD cannot pay someone to check the media presentations before release?
 
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So will arrowlake have a node advantage over Zen5 on desktop?
 
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I noticed a lot of different treatments of the four SKUs over the entire presentation from benchmark choice to only showing results from the 9900X, 9700X and 9600X. It's very strange.
 

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Come on, a firm like the AMD cannot pay someone to check the media presentations before release?

Admittedly they have had issues with this in the past. The enter Zen 4 press deck was recalled the day after the reveal event because of errors. A replacement deck was issued the next day.
 
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honestly a lot of their slides don't add up HUB pointed it out in their overview.... Like with anything we just need to wait for reviews.
 
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At least my initial deduction was right :D (Moooom get the camera)
 
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I noticed a lot of different treatments of the four SKUs over the entire presentation from benchmark choice to only showing results from the 9900X, 9700X and 9600X. It's very strange.

They covered the 9950X at the computex presentation. Doesn’t seem weird as they excluded most data on the 9600X-9900X then, this seems to be filling the gaps information wise. Aside from pricing that is, they will hold off until release to keep Intel in the air.
 
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Come on, a firm like the AMD cannot pay someone to check the media presentations before release?
You'd be shocked how much of a disconnect there is between marketing and engineering/validation at a company. Where I work we had a graphics design guy change all of the 1's to l's in one of our catalog brochures because the "type spacing looked better".
 
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I all ready knew it supported pbo. There has been some leaks of performance at different max wattage and there pbo was clearly used.

I am more interesting in how much oc and tweaking the 3D variants support and off cause pbo use on these cpu's. Cause according to some leaks zen 5 3D will now support full overclocking or at least way more pc and tweaking than it was with zen 4 and specially zen 3 that was pretty much locked.
 
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I all ready knew it supported pbo. There has been some leaks of performance at different max wattage and there pbo was clearly used.

I am more interesting in how much oc and tweaking the 3D variants support and off cause pbo use on these cpu's. Cause according to some leaks zen 5 3D will now support full overclocking or at least way more pc and tweaking than it was with zen 4 and specially zen 3 that was pretty much locked.

They've seemingly improved heat transfer on the ihs massively so at a min they should just generally boost higher especially when pushed really hard.... My guess is 360+ aio and water cooling will finally make a decent difference on Ryzen again....

Someone with an engineering sample was pushing it really hard on the anandtech forums and temps were pretty reasonable on water.
 
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They've seemingly improved heat transfer on the ihs massively so at a min they should just generally boost higher especially when pushed really hard.... My guess is 360+ aio and water cooling will finally make a decent difference on Ryzen again....

Someone with an engineering sample was pushing it really hard on the anandtech forums and temps were pretty reasonable on water.
It's here in one of these threads somewhere, but apparently AMD only moved the temperature sensor to a more accurate spot on the die. This allows them to use less 'fudge factor' numbers as they're actually measuring the hottest spot and not just guessing and applying a buffer to keep it safe. No changes to either the IHS or how it's mated to the dies.
 
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It's here in one of these threads somewhere, but apparently AMD only moved the temperature sensor to a more accurate spot on the die. This allows them to use less 'fudge factor' numbers as they're actually measuring the hottest spot and not just guessing and applying a buffer to keep it safe. No changes to either the IHS or how it's mated to the dies.

Makes sense on my 7950X3D the tctl is in the high 70s but no core breaks 65C and the non 3D CCD never breaks 60C....

Always found that a bit confusing actually remounted my cooling countless times thinking it was poor contact causing it.
 
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So will arrowlake have a node advantage over Zen5 on desktop?
Yes and no. TSMC's N3B is pretty poor update and is way under performant for 3nm. Semianalysis did a deep dive and were disappointed. Most companies other than Apple and now Intel avoided it for N3E.

N4P is far cheaper than N3B and not much worse in key metrics. Look at this comparison to N5 and N4P is 6% denser and not much different to N3B. N3E is imprved version of N3B.

1721183923439.png



I think AMD is smart to use cheaper but more refined node. When Zen 6 comes out they will probabbly use N3P while Intel may have a lead with 18A for Panther Lake with GAAFET. TSMC not using GAAFET until N2 I think.
 
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