EPYC 9965 (192 cores ZEN5c), a design error?

[Nhonho]

The more cores a CPU has, the more cache memory it needs, since increasing the number of cores increases the "competition" between the cores for access to RAM. And with a larger amount of cache, more data is copied in advance from RAM to cache and read directly from it by the cores, thus preventing cores from idling (and consequently losing performance) due to delays in accessing data in main RAM.

With the EPYC 9965 CPU (192 cores), AMD did exactly the opposite of what logic suggests: it greatly increased the number of cores and halved the amount of L3 cache memory.

It seems that, in the video encoding test of the link below (done by Tom's Hardware), exactly what was described above happened: the EPYC 9965 CPU (192 cores) had a poor performance, similar to the EPYC 9575F CPU, which has only 64 cores.

And on the EPYC CPU specifications pages, AMD did the "favor" of not showing which type of core the processor has (whether ZEN5, ZEN5c, etc.), nor does it show which instruction sets the processor supports or how much cache memory each CPU/chiplet has:

https://www.amd.com/en/products/processors/server/epyc/9005-series/amd-epyc-9965.html

https://www.amd.com/en/products/processors/server/epyc/9005-series/amd-epyc-9575f.html

Source:

AMD EPYC ‘Turin’ 9005 Series - we benchmark 192-core Zen 5 chip with 500W TDP

Cranking up the power.

www.tomshardware.com

 

[eidairaman1]

Boost clocks...

 

[Vincero]

It seems that, in the video encoding test of the link below (done by Tom's Hardware), exactly what was described above happened: the EPYC 9965 CPU (192 cores) had a poor performance, similar to the EPYC 9575F CPU, which has only 64 cores.

There will be less cache sensitive workloads - to be fair it's really the problem of the server buyer / workload intention to dictate what you need it for and what is best product for the job.
There will be a similar issue for Intel's all E-core server parts.

Nobody ever said you can swap one for the other and not see an impact.
The reduced cache size will impact in a number of ways such as processes that spread threads over many cores, not just memory buffering. Again, workload choice will make a difference.

And on the EPYC CPU specifications pages, AMD did the "favor" of not showing which type of core the processor has (whether ZEN5, ZEN5c, etc.), nor does it show which instruction sets the processor supports or how much cache memory each CPU/chiplet has:

I have to admit, not identifying the core type isn't great but the cache amounts, etc., will give it away (for those who know what they're looking for).
As for CPU capabilities, unlike Intel, Zen and Zen-c cores share the same CPU caps.
A full list is handy to have though, although at this point in time it supports pretty much everything except Intel's AVX10 (or AVX-512 2nd attempt)

 

[DirtyDingusMcgee]

Get a load of that test rig.

I could think of better things to do with it than encode videos......like virtualize several small companies worth of servers.

 

[igormp]

It seems that, in the video encoding test of the link below (done by Tom's Hardware), exactly what was described above happened: the EPYC 9965 CPU (192 cores) had a poor performance, similar to the EPYC 9575F CPU, which has only 64 cores.

You are hyperfocusing on a single task. First of all, video encoding has an upper limit on how much it can be made parallel, and that also depends on the encoder being used, and also the config of said encoder.
For SVT-AV1, here are some different behaviours for different presets:

A 16-core beating a 64-core CPU.

Here the 64-core with higher frequencies take the lead.

Another thing is that those encoding tests are NOT dependent on memory bandwidth. This can be easily seen here:

Anyhow, Zen 5c is not meant to be encoding videos, it's meant for hyperscalers that are looking for really high core density.

And on the EPYC CPU specifications pages, AMD did the "favor" of not showing which type of core the processor has (whether ZEN5, ZEN5c, etc.), nor does it show which instruction sets the processor supports or how much cache memory each CPU/chiplet has:

AMD's spec page is awfuly bad, but they did give a list of which models had Zen5c cores and which did not:

Instruction set is AVX-512, caches you need to dig somewhere else.

 

[DirtyDingusMcgee]

I don't get to use many AMD branded prototypes. Who's case is that? Doesn't look like a supermicro or mitac. Custom water loop, or is it one of those dynatron setups? They were a bit scant on the details of the system, and I can't see many of the part numbers.