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Is This The Next Big Thing - Near Zero Energy Chips

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We've already achieve this with Arm processors.
The are asvertised as 3.8µW/MHz (Cortex-M0+)
According to a quick search.

There's never going to be a device that uses 0 energy. Near zero, depends on how you look at the distance. Below 1 watt near 0?
Below half watt near 0?

What is near zero in your opinion?
 

eidairaman1

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We've already achieve this with Arm processors.
The are asvertised as 3.8µW/MHz (Cortex-M0+)
According to a quick search.

There's never going to be a device that uses 0 energy. Near zero, depends on how you look at the distance. Below 1 watt near 0?
Below half watt near 0?

What is near zero in your opinion?
Absolute Zero (0°K, -273.15°C, -459.67°F) the point at which all atomic and sub atomic particles stop moving.

Appears to me they are trying to figure out how to make a semiconductor that doesn't suffer a 'cold bug'
 
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True, even without being reversible, a chip designed to run cold could throw out less heat when discarding information, but it could not then function when hot. That leaves us with the energy needed to keep it cool which might negate any gains. Quantum computers are intrinsically reversible but have their own issues with error correction.

So, these classical reversible chips look to be the way of the future.
 
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well, first of all, I am not an expert, but if you can find a way "trick" to lets say, make a hundrer transistor work by design to work reliable with the power used by 10 transistors, istead of transforming it into heat, you start to see the benefit when you have a milion and above transistors, but I really don´t know how real this tech is, I just tought it was something interesting, ok?
 
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We've already achieve this with Arm processors.
The are asvertised as 3.8µW/MHz (Cortex-M0+)
According to a quick search.

There's never going to be a device that uses 0 energy. Near zero, depends on how you look at the distance. Below 1 watt near 0?
Below half watt near 0?

What is near zero in your opinion?
Good point. Our present-day computers operate a lot nearer to zero energy (per MHz/KHz) compared to house-sized ones in the '60s. Your phone's CPU also operates a lot nearer to zero energy per MHz compared to the one in your desktop PC.
 

qxp

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Just want to mention some existing applications of cold chips - cooling sensors for better camera sensitivity, especially in infrared. Transition edge detectors that detect single quanta of microwaves - they are composed of small wires operating just below superconducting transition temperature. When they absorb a quantum of energy this pushes them above transition temperature greatly increasing resistance.

Also, from what I heard the cell towers use RF amplifieres cooled to cryogenic temperatures - this reduces the noise figure. Apparently the techology got developed well enough that the whole device looks like a brick and does not need much maintenance.
 
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if you can find a way "trick" to lets say, make a hundrer transistor work by design to work reliable with the power used by 10 transistors, istead of transforming it into heat, you start to see the benefit when you have a milion and above transistors, but I really don´t know how real this tech is, I just tought it was something interesting, ok?
That's a simple description of what CPU design has been doing for decades now...

Power consumption (and heat generation) per transistor has been following a downward trend.
Lookup how many transistors Pentium 4 had, compared to a recent Core proc, and divide their respective power consumptions with these counts. Same goes for consumption per FLOPS. And as ShrimpBrime has pointed out, the same holds true for consumption/clock cycle.
 
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Is this the same thing as near-threshold computing, that is, running transistors at just enough voltage to work?

Also, from what I heard the cell towers use RF amplifieres cooled to cryogenic temperatures - this reduces the noise figure. Apparently the techology got developed well enough that the whole device looks like a brick and does not need much maintenance.
It's probably just Peltier cooling. The use of this technology to cool transistors is as old as the transistor.
 

qxp

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It's probably just Peltier cooling. The use of this technology to cool transistors is as old as the transistor.
Peltier elements have trouble reaching below -85C (188K). Cryogenic amplifiers can be cooled with liquid helium, but I think in commercial applications they use pulse tube cryocoolers similar to these


They have a range of 3K to 80K.
 

Count von Schwalbe

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That leaves us with the energy needed to keep it cool which might negate any gains.
True, from an efficiency standpoint.

However, it reduces the need to feed a great many watts to the processor itself. This simplifies engineering considerably. Also, from a data center standpoint, the cooling will benefit from economies of scale. The chips do not.
 
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Extremely interesting, but the need to incorporate these far larger adiabatic circuits is going to make the chip's footprint significantly physically larger (the example shown in the video was 34nm when we're already at ~5nm commercially), which doesn't strike me as particularly feasible - especially given how large chips are already getting at the wall of Moore's Law. It also strikes me as significantly more expensive and another component that can go wrong during fabrication.
 
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True, from an efficiency standpoint.

However, it reduces the need to feed a great many watts to the processor itself. This simplifies engineering considerably. Also, from a data center standpoint, the cooling will benefit from economies of scale. The chips do not.

An interesting take
 

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An interesting take
I didn't actually watch the video, but that does hold true for most data center applications. They usually have centralized chilled water systems for the efficiency bonus. They use cold coils inside the server racks themselves if they do not direct-die waterblock cool.

I was just thinking that running it all at subzero would be similar, if it wasn't for the high installed cost to put in that level of building insulation. Perhaps in northern climates. I think the underwater data centers that Microsoft trialed were designed to run at low temperatures for the efficiency.
 
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I believe that hot electronics runs more efficiently.
 
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Also, from what I heard the cell towers use RF amplifieres cooled to cryogenic temperatures
Where did you hear this? I want to point and laugh at the author.
 

qxp

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Extremely interesting, but the need to incorporate these far larger adiabatic circuits is going to make the chip's footprint significantly physically larger (the example shown in the video was 34nm when we're already at ~5nm commercially), which doesn't strike me as particularly feasible - especially given how large chips are already getting at the wall of Moore's Law. It also strikes me as significantly more expensive and another component that can go wrong during fabrication.

The other problem with size is speed of light. Modern CPUs include stages for moving data from one end of the chip to another because you need a clock cycle or more to do it. In vacuum c/5GHz=60mm, but the speed of light inside the silicon is smaller.
Where did you hear this? I want to point and laugh at the author.
I heard this at the university. Here is a paper I found online that says that says first use occurred in 1995. I can not easily find companies selling products. It could be it is "quote only" since there are only a few cell companies, but it could also be that conventional electronics have changed enough to not need this.


There are companies selling cryogenic low noise amplifiers for scientific applications:

 
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I heard this at the university. Here is a paper I found online that says that says first use occurred in 1995. I can not easily find companies selling products. It could be it is "quote only" since there are only a few cell companies, but it could also be that conventional electronics have changed enough to not need this.
Nobody is doing cryogenic cooling in the field.

Here’s what they are using
 

qxp

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Nobody is doing cryogenic cooling in the field.
Interesting, must be that technology made this unnecessary. I wonder how much of that is due to software radio techiques.

Here’s what they are using
This is a power amplifier module, it does not need cryogenics because it outputs 10W. You'd use cryogenics on the receive side to increase sensitivity.

I did a quick search and found an example LNA that does not need dedicated cooling:


Noise figure of 0.35dB is really nice and corresponds to the temperature of around 24K (https://www.rfcafe.com/references/calculators/noise-figure-temperature-calculator.htm). I wonder how they did that..
 
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This is a power amplifier module, it does not need cryogenics because it outputs 10W. You'd use cryogenics on the receive side to increase sensitivity.
Read again
NXP’s first top-side cooled RF power module series is designed for 32T32R, 200 W radios covering 3.3 GHz to 3.8 GHz
Seriously, you’re out of your depth here. Don’t triple down, OK?
 

qxp

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Read again
I was looking at the datasheet for the actual module, here is a link to the page with the datasheet and pricing:


It might have been designed for 200W radios, but the module only outputs 10W. They probably envision using them in parallel.

Regardless of whether it is 10W or 200W, the power amplifier module does not benefit much in its noise figure from cooling to cryogenic temperatures because it is expected to be provided loud enough signals to not worry much about its own noise temperature.

A low noise amplifier and the input circuits used to receive signals can benefit from cryogenic cooling because this reduces the level of thermal noise.

Seriously, you’re out of your depth here. Don’t triple down, OK?
Actually I am pretty comfortable.
 
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