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Logic Fruit Technologies, a leading provider of cutting-edge FPGA-based solutions, proudly announces the release of its latest High-Speed Interface IP stack, including PCIe Gen 6 Controller IP, PCIe Gen 6 PHY IP, and CXL 3 Controller IP.
These high-performance solutions enable seamless data transfer, ensuring reliability, scalability, and efficiency for next-generation computing applications such as AI/ML, data centers, and high-performance networking.
Next-Gen PCIe and CXL Solutions for High-Speed Applications
Logic Fruit's new IP portfolio addresses the growing demand for high-speed, low-latency, and reliable interconnect solutions in modern computing environments.
Empowering Future-Ready Designs
These high-speed interface IPs are engineered to enhance system performance, reduce latency, and simplify integration across compute-intensive domains. With scalable throughput, configurable link widths, and compliance with the latest PCIe and CXL standards, Logic Fruit Technologies reaffirms its commitment to delivering cutting-edge solutions for evolving data-centric applications.
Logic Fruit Technologies will also announce the release of these High-Speed Interface IPs at Embedded World 2025 in Nuremberg! Join us at Booth #5-421B from March 11-13, 2025, and be part of this milestone moment.
View at TechPowerUp Main Site | Source
These high-performance solutions enable seamless data transfer, ensuring reliability, scalability, and efficiency for next-generation computing applications such as AI/ML, data centers, and high-performance networking.

Next-Gen PCIe and CXL Solutions for High-Speed Applications
Logic Fruit's new IP portfolio addresses the growing demand for high-speed, low-latency, and reliable interconnect solutions in modern computing environments.
- PCIe Gen 6 Controller IP - Supporting PCIe 6.x standards, this controller IP delivers up to 64 GT/s per lane with enhanced Reliability, Availability, and Serviceability (RAS) features. Designed for Root Port and Endpoint configurations, it enables multichannel packet processing and ensures data integrity in high-speed applications like HPC, AI, and cloud computing.
- PCIe Gen 6 PHY IP - Built for high-speed data transfer, the PCIe Gen 6 PHY IP integrates PAM4 signaling for efficient and reliable communication at 64 GT/s per lane. Its compliance with PCIe base 6.2 standards and support for power management states ensure seamless performance in next-generation storage and AI/ML workloads.
- CXL 3 Controller IP - Offering dual-mode operation (host and device), this IP supports 64 GT/s data rates via the PIPE 6.x interface. It is forward-compatible with CXL 3.x and supports memory caching, latency-optimized mode, and address translation services (ATS), making it ideal for scalable, high-performance computing environments.
Empowering Future-Ready Designs
These high-speed interface IPs are engineered to enhance system performance, reduce latency, and simplify integration across compute-intensive domains. With scalable throughput, configurable link widths, and compliance with the latest PCIe and CXL standards, Logic Fruit Technologies reaffirms its commitment to delivering cutting-edge solutions for evolving data-centric applications.
Logic Fruit Technologies will also announce the release of these High-Speed Interface IPs at Embedded World 2025 in Nuremberg! Join us at Booth #5-421B from March 11-13, 2025, and be part of this milestone moment.
View at TechPowerUp Main Site | Source